From 23b34d1456578631fb5a2c064eb8f9e87e7d48b4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 2 Nov 2017 10:21:08 +0100 Subject: arm64: zynqmp: Use revision in dts file description Trivial change. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index d8ac008f2b..581ecd76e8 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -1,5 +1,5 @@ /* - * dts file for Xilinx ZynqMP ZCU102 + * dts file for Xilinx ZynqMP ZCU102 RevA * * (C) Copyright 2015, Xilinx, Inc. * -- cgit From d801ce553e84fded21060804f577b944da445317 Mon Sep 17 00:00:00 2001 From: Chirag Parekh Date: Wed, 25 Jan 2017 07:00:57 -0800 Subject: arm64: zynqmp: Update device tree for gpio Used defines rather than raw values for gpio configurations. Signed-off-by: Chirag Parekh Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 581ecd76e8..fd7d646671 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -60,7 +60,7 @@ compatible = "gpio-leds"; heartbeat_led { label = "heartbeat"; - gpios = <&gpio 23 0>; + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; -- cgit From f811eca9db05fc89fe52141b256231ff94859add Mon Sep 17 00:00:00 2001 From: Bharat Kumar Gogada Date: Mon, 30 Jan 2017 12:06:02 +0530 Subject: arm64: zynqmp: zcu102: Modifying GTR lane-0 to PCIe - Enabling GTR lane-0 to PCIe - Enabling PCIe node in device tree Signed-off-by: Bharat Kumar Gogada Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index fd7d646671..df916d0f77 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -168,7 +168,7 @@ gtr_sel0 { gpio-hog; gpios = <0 0>; - output-high; /* PCIE = 0, DP = 1 */ + output-low; /* PCIE = 0, DP = 1 */ line-name = "sel0"; }; gtr_sel1 { @@ -551,7 +551,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o }; &pcie { -/* status = "okay"; */ + status = "okay"; }; &qspi { -- cgit From 6507be780027d4d7cf02870a58a492f8933d38a0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 10 Feb 2017 14:11:54 +0100 Subject: arm64: zynqmp: Remove local-mac-address from dtsi file Generic dtsi file can't use the same mac address for all. U-Boot read mac from eeprom in zcu102 case and for others random mac address is generated. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index df916d0f77..66dc110a96 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -118,7 +118,6 @@ &gem3 { status = "okay"; - local-mac-address = [00 0a 35 00 02 90]; phy-handle = <&phy0>; phy-mode = "rgmii-id"; phy0: phy@21 { -- cgit From 9c77cb73c7648b24ea251392148e2bc386b990d3 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 2 Nov 2017 11:51:59 +0100 Subject: arm64: zynqmp: Update device tree for pinmux Added pin control support in device tree for zynqmp. Signed-off-by: Chirag Parekh Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 289 ++++++++++++++++++++++++++++++++++++ 1 file changed, 289 insertions(+) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 66dc110a96..eb361b0036 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp.dtsi" #include "zynqmp-clk.dtsi" #include +#include / { model = "ZynqMP ZCU102 RevA"; @@ -68,6 +69,8 @@ &can1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; }; &dcc { @@ -120,6 +123,8 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem3_default>; phy0: phy@21 { reg = <21>; ti,rx-internal-delay = <0x8>; @@ -130,6 +135,8 @@ &gpio { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_default>; }; &gpu { @@ -139,6 +146,11 @@ &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c0_default>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; tca6416_u97: gpio@20 { /* @@ -400,6 +412,12 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o &i2c1 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + /* FIXME PL i2c via PCA9306 - u45 */ /* FIXME MSP430 - u41 - not detected */ i2cswitch@74 { /* u34 */ @@ -549,6 +567,269 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o }; }; +&pinctrl0 { + status = "okay"; + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_3_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_3_grp"; + bias-pull-up; + slew-rate = ; + io-standard = ; + }; + }; + + pinctrl_i2c0_gpio: i2c0-gpio { + mux { + groups = "gpio0_14_grp", "gpio0_15_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_14_grp", "gpio0_15_grp"; + slew-rate = ; + io-standard = ; + }; + }; + + pinctrl_i2c1_default: i2c1-default { + mux { + groups = "i2c1_4_grp"; + function = "i2c1"; + }; + + conf { + groups = "i2c1_4_grp"; + bias-pull-up; + slew-rate = ; + io-standard = ; + }; + }; + + pinctrl_i2c1_gpio: i2c1-gpio { + mux { + groups = "gpio0_16_grp", "gpio0_17_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_16_grp", "gpio0_17_grp"; + slew-rate = ; + io-standard = ; + }; + }; + + pinctrl_uart0_default: uart0-default { + mux { + groups = "uart0_4_grp"; + function = "uart0"; + }; + + conf { + groups = "uart0_4_grp"; + slew-rate = ; + io-standard = ; + }; + + conf-rx { + pins = "MIO18"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO19"; + bias-disable; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_5_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_5_grp"; + slew-rate = ; + io-standard = ; + }; + + conf-rx { + pins = "MIO21"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO20"; + bias-disable; + }; + }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = ; + io-standard = ; + }; + + conf-rx { + pins = "MIO52", "MIO53", "MIO55"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", + "MIO60", "MIO61", "MIO62", "MIO63"; + bias-disable; + }; + }; + + pinctrl_gem3_default: gem3-default { + mux { + function = "ethernet3"; + groups = "ethernet3_0_grp"; + }; + + conf { + groups = "ethernet3_0_grp"; + slew-rate = ; + io-standard = ; + }; + + conf-rx { + pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", + "MIO75"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", + "MIO69"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio3"; + groups = "mdio3_0_grp"; + }; + + conf-mdio { + groups = "mdio3_0_grp"; + slew-rate = ; + io-standard = ; + bias-disable; + }; + }; + + pinctrl_can1_default: can1-default { + mux { + function = "can1"; + groups = "can1_6_grp"; + }; + + conf { + groups = "can1_6_grp"; + slew-rate = ; + io-standard = ; + }; + + conf-rx { + pins = "MIO25"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO24"; + bias-disable; + }; + }; + + pinctrl_sdhci1_default: sdhci1-default { + mux { + groups = "sdio1_0_grp"; + function = "sdio1"; + }; + + conf { + groups = "sdio1_0_grp"; + slew-rate = ; + io-standard = ; + bias-disable; + }; + + mux-cd { + groups = "sdio1_0_cd_grp"; + function = "sdio1_cd"; + }; + + conf-cd { + groups = "sdio1_0_cd_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + io-standard = ; + }; + + mux-wp { + groups = "sdio1_0_wp_grp"; + function = "sdio1_wp"; + }; + + conf-wp { + groups = "sdio1_0_wp_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = ; + io-standard = ; + }; + }; + + pinctrl_gpio_default: gpio-default { + mux-sw { + function = "gpio0"; + groups = "gpio0_22_grp", "gpio0_23_grp"; + }; + + conf-sw { + groups = "gpio0_22_grp", "gpio0_23_grp"; + slew-rate = ; + io-standard = ; + }; + + mux-msp { + function = "gpio0"; + groups = "gpio0_13_grp", "gpio0_38_grp"; + }; + + conf-msp { + groups = "gpio0_13_grp", "gpio0_38_grp"; + slew-rate = ; + io-standard = ; + }; + + conf-pull-up { + pins = "MIO22", "MIO23"; + bias-pull-up; + }; + + conf-pull-none { + pins = "MIO13", "MIO38"; + bias-disable; + }; + }; +}; + &pcie { status = "okay"; }; @@ -603,21 +884,29 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o /* SD1 with level shifter */ &sdhci1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci1_default>; no-1-8-v; /* for 1.0 silicon */ xlnx,mio_bank = <1>; }; &uart0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; /* ULPI SMSC USB3320 */ &usb0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; &dwc3_0 { -- cgit From ae9775f82218b3207e03846831cd5148e1031959 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 2 Nov 2017 11:42:12 +0100 Subject: arm64: zynqmp: Add support for zcu102 1.0 rev 1.0 rev is the latest rev. Describe information in eeprom. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index eb361b0036..9e5a13d5bc 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -437,7 +437,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o * 512B - 768B address 0x56 * 768B - 1024B address 0x57 */ - eeprom@54 { /* u23 */ + eeprom: eeprom@54 { /* u23 */ compatible = "at,24c08"; reg = <0x54>; }; -- cgit From 795ebc0e6463ad799d8351a8809160d08de4ff8e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 2 Nov 2017 12:04:43 +0100 Subject: arm64: zynqmp: dt: Add AMS node The AMS includes an ADC as well as on-chip sensors that can be used to sample external voltages and monitor on-die operating conditions, such as temperature and supply voltage levels. Signed-off-by: Rajnikant Bhojani Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 9e5a13d5bc..579212ed20 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -914,6 +914,18 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o dr_mode = "host"; }; +&xilinx_ams { + status = "okay"; +}; + +&ams_ps { + status = "okay"; +}; + +&ams_pl { + status = "okay"; +}; + &xilinx_drm { status = "okay"; clocks = <&si570_1>; -- cgit From b10255f8e00006c75ee3f104b0828c4ec7706750 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 2 Nov 2017 12:45:10 +0100 Subject: arm64: zynqmp: Add note about si5328 interrupt Add comment about irq present on the board connected to PL. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 579212ed20..714cf365b0 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -485,6 +485,11 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o si5328: clock-generator4@69 {/* SI5328 - u20 */ compatible = "silabs,si5328"; reg = <0x69>; + /* + * Chip has interrupt present connected to PL + * interrupt-parent = <&>; + * interrupts = <>; + */ }; }; /* 5 - 7 unconnected */ -- cgit From fe16aa4b0290ec604c9b07e3b50c2a4fb069c573 Mon Sep 17 00:00:00 2001 From: Shubhrajyoti Datta Date: Thu, 6 Apr 2017 12:28:14 +0530 Subject: arm64: zynqmp: Enable watchdog by default Enable watchdog in dts for zcu102. Signed-off-by: Shubhrajyoti Datta Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 714cf365b0..a2128ebfd8 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -919,6 +919,10 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o dr_mode = "host"; }; +&watchdog0 { + status = "okay"; +}; + &xilinx_ams { status = "okay"; }; -- cgit