From 45bf05854bc94ed8bae9e9114292895b990327ea Mon Sep 17 00:00:00 2001 From: Aneesh V Date: Thu, 16 Jun 2011 23:30:53 +0000 Subject: armv7: adapt omap3 to the new cache maintenance framework adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V --- arch/arm/include/asm/arch-omap3/omap3.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/arm/include/asm/arch-omap3/omap3.h') diff --git a/arch/arm/include/asm/arch-omap3/omap3.h b/arch/arm/include/asm/arch-omap3/omap3.h index cc2b5415c1..d9d49da566 100644 --- a/arch/arm/include/asm/arch-omap3/omap3.h +++ b/arch/arm/include/asm/arch-omap3/omap3.h @@ -159,8 +159,14 @@ struct gpio { #define SRAM_VECT_CODE (SRAM_OFFSET0 | SRAM_OFFSET1 | \ SRAM_OFFSET2) +#define OMAP3_PUBLIC_SRAM_BASE 0x40208000 /* Works for GP & EMU */ +#define OMAP3_PUBLIC_SRAM_END 0x40210000 + #define LOW_LEVEL_SRAM_STACK 0x4020FFFC +/* scratch area - accessible on both EMU and GP */ +#define OMAP3_PUBLIC_SRAM_SCRATCH_AREA OMAP3_PUBLIC_SRAM_BASE + #define DEBUG_LED1 149 /* gpio */ #define DEBUG_LED2 150 /* gpio */ @@ -227,4 +233,18 @@ struct gpio { #define OMAP3730 0x0c00 +/* + * ROM code API related flags + */ +#define OMAP3_GP_ROMCODE_API_L2_INVAL 1 +#define OMAP3_GP_ROMCODE_API_WRITE_ACR 3 + +/* + * EMU device PPA HAL related flags + */ +#define OMAP3_EMU_HAL_API_L2_INVAL 40 +#define OMAP3_EMU_HAL_API_WRITE_ACR 42 + +#define OMAP3_EMU_HAL_START_HAL_CRITICAL 4 + #endif -- cgit