From e66c49fa930ed002c507ae0217b4b274c25675fb Mon Sep 17 00:00:00 2001 From: Vikas Manocha Date: Thu, 11 Feb 2016 15:47:20 -0800 Subject: stm32: add support for stm32f7 & stm32f746 discovery board This patch adds support for stm32f7 family & stm32f746 board. Signed-off-by: Vikas Manocha --- arch/arm/include/asm/arch-stm32f7/gpt.h | 53 +++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/arm/include/asm/arch-stm32f7/gpt.h (limited to 'arch/arm/include/asm/arch-stm32f7/gpt.h') diff --git a/arch/arm/include/asm/arch-stm32f7/gpt.h b/arch/arm/include/asm/arch-stm32f7/gpt.h new file mode 100644 index 0000000000..903bdf6314 --- /dev/null +++ b/arch/arm/include/asm/arch-stm32f7/gpt.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2016 + * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _STM32_GPT_H +#define _STM32_GPT_H + +#include + +struct gpt_regs { + u32 cr1; + u32 cr2; + u32 smcr; + u32 dier; + u32 sr; + u32 egr; + u32 ccmr1; + u32 ccmr2; + u32 ccer; + u32 cnt; + u32 psc; + u32 arr; + u32 reserved; + u32 ccr1; + u32 ccr2; + u32 ccr3; + u32 ccr4; + u32 reserved1; + u32 dcr; + u32 dmar; + u32 tim2_5_or; +}; + +struct gpt_regs *const gpt1_regs_ptr = + (struct gpt_regs *)TIM2_BASE; + +/* Timer control1 register */ +#define GPT_CR1_CEN 0x0001 +#define GPT_MODE_AUTO_RELOAD (1 << 7) + +/* Auto reload register for free running config */ +#define GPT_FREE_RUNNING 0xFFFFFFFF + +/* Timer, HZ specific defines */ +#define CONFIG_STM32_HZ 1000 + +/* Timer Event Generation registers */ +#define TIM_EGR_UG (1 << 0) + +#endif -- cgit