From 0d2c0d578833765babb7f6aa063de5bf09f461a2 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 21 Mar 2014 12:28:49 -0600 Subject: ARM: tegra: pinctrl: remove func_safe This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra114/pinmux.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/include/asm/arch-tegra114/pinmux.h') diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index 9c22c08b6e..edf1a89ce1 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -367,7 +367,6 @@ enum pmux_func { PMUX_FUNC_RESET_OUT_N, /* End of Tegra114 MUX selectors */ - PMUX_FUNC_SAFE, PMUX_FUNC_MAX, PMUX_FUNC_INVALID = 0x4000, -- cgit From dd45948dd748581dba5b666fe17601f32205cda2 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 21 Mar 2014 12:28:50 -0600 Subject: ARM: tegra: pinctrl: remove vddio This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra114/pinmux.h | 21 --------------------- 1 file changed, 21 deletions(-) (limited to 'arch/arm/include/asm/arch-tegra114/pinmux.h') diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index edf1a89ce1..93d2ca525c 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -449,27 +449,6 @@ enum pmux_pin_rcv_sel { (((rcv_sel) >= PMUX_PIN_RCV_SEL_DEFAULT) && \ ((rcv_sel) <= PMUX_PIN_RCV_SEL_HIGH)) -/* Available power domains used by pin groups */ -enum pmux_vddio { - PMUX_VDDIO_BB = 0, - PMUX_VDDIO_LCD, - PMUX_VDDIO_VI, - PMUX_VDDIO_UART, - PMUX_VDDIO_DDR, - PMUX_VDDIO_NAND, - PMUX_VDDIO_SYS, - PMUX_VDDIO_AUDIO, - PMUX_VDDIO_SD, - PMUX_VDDIO_CAM, - PMUX_VDDIO_GMI, - PMUX_VDDIO_PEXCTL, - PMUX_VDDIO_SDMMC1, - PMUX_VDDIO_SDMMC3, - PMUX_VDDIO_SDMMC4, - - PMUX_VDDIO_NONE -}; - #define PGRP_SLWF_NONE -1 #define PGRP_SLWF_MAX 3 #define PGRP_SLWR_NONE PGRP_SLWF_NONE -- cgit From 07bbd48b4785f28b41ceeab4337d7690837e6ec1 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 21 Mar 2014 12:28:52 -0600 Subject: ARM: tegra: prototype pinmux_init() in board.h pinmux_init() is a board-level function, not a pinmux driver function. Move the prototype to a board header rather than the driver header. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra114/pinmux.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/arm/include/asm/arch-tegra114/pinmux.h') diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index 93d2ca525c..a06b24f412 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -580,9 +580,6 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io); */ void pinmux_config_table(struct pingroup_config *config, int len); -/* Set a group of pins from a table */ -void pinmux_init(void); - /** * Set the GP pad configs * -- cgit From e296995767e645ed047bcbec90923297a24d4d5a Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 21 Mar 2014 12:28:54 -0600 Subject: ARM: tegra: pinctrl: remove duplication Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the duplication by creating pinmux-common.c for all the identical code. This leaves: * arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of the various pins/pin groups, drive groups, and mux functions. * arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table stating which pin groups support which mux functions. The code in pinmux-common.c is semantically identical to that in the various original pinmux.c, but had some consistency and cleanup fixes applied during migration. I removed the definition of struct pmux_tri_ctlr, since this is different between SoCs (especially Tegra20 vs all others), and it's much simpler to deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c, and warmboot_avp.c needed updates due to this, since they previously hijacked this struct to encode the location of some non-pinmux registers. Now, that code simply calculates these register addresses directly using simple and obvious math. I like this method better irrespective of the pinmux code cleanup anyway. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra114/pinmux.h | 219 +--------------------------- 1 file changed, 6 insertions(+), 213 deletions(-) (limited to 'arch/arm/include/asm/arch-tegra114/pinmux.h') diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index a06b24f412..00ef542354 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -367,7 +367,7 @@ enum pmux_func { PMUX_FUNC_RESET_OUT_N, /* End of Tegra114 MUX selectors */ - PMUX_FUNC_MAX, + PMUX_FUNC_COUNT, PMUX_FUNC_INVALID = 0x4000, PMUX_FUNC_RSVD1 = 0x8000, @@ -376,216 +376,9 @@ enum pmux_func { PMUX_FUNC_RSVD4 = 0x8003, }; -/* return 1 if a pmux_func is in range */ -#define pmux_func_isvalid(func) ((((func) >= 0) && ((func) < PMUX_FUNC_MAX)) \ - || (((func) >= PMUX_FUNC_RSVD1) && ((func) <= PMUX_FUNC_RSVD4))) +#define TEGRA_PMX_HAS_PIN_IO_BIT_ETC +#define TEGRA_PMX_HAS_RCV_SEL +#define TEGRA_PMX_HAS_PADGRPS +#include -/* return 1 if a pingrp is in range */ -#define pmux_pingrp_isvalid(pin) (((pin) >= 0) && ((pin) < PINGRP_COUNT)) - -/* The pullup/pulldown state of a pin group */ -enum pmux_pull { - PMUX_PULL_NORMAL = 0, - PMUX_PULL_DOWN, - PMUX_PULL_UP, -}; -/* return 1 if a pin_pupd_is in range */ -#define pmux_pin_pupd_isvalid(pupd) (((pupd) >= PMUX_PULL_NORMAL) && \ - ((pupd) <= PMUX_PULL_UP)) - -/* Defines whether a pin group is tristated or in normal operation */ -enum pmux_tristate { - PMUX_TRI_NORMAL = 0, - PMUX_TRI_TRISTATE = 1, -}; -/* return 1 if a pin_tristate_is in range */ -#define pmux_pin_tristate_isvalid(tristate) (((tristate) >= PMUX_TRI_NORMAL) \ - && ((tristate) <= PMUX_TRI_TRISTATE)) - -enum pmux_pin_io { - PMUX_PIN_OUTPUT = 0, - PMUX_PIN_INPUT = 1, - PMUX_PIN_NONE, -}; -/* return 1 if a pin_io_is in range */ -#define pmux_pin_io_isvalid(io) (((io) >= PMUX_PIN_OUTPUT) && \ - ((io) <= PMUX_PIN_INPUT)) - -enum pmux_pin_lock { - PMUX_PIN_LOCK_DEFAULT = 0, - PMUX_PIN_LOCK_DISABLE, - PMUX_PIN_LOCK_ENABLE, -}; -/* return 1 if a pin_lock is in range */ -#define pmux_pin_lock_isvalid(lock) (((lock) >= PMUX_PIN_LOCK_DEFAULT) && \ - ((lock) <= PMUX_PIN_LOCK_ENABLE)) - -enum pmux_pin_od { - PMUX_PIN_OD_DEFAULT = 0, - PMUX_PIN_OD_DISABLE, - PMUX_PIN_OD_ENABLE, -}; -/* return 1 if a pin_od is in range */ -#define pmux_pin_od_isvalid(od) (((od) >= PMUX_PIN_OD_DEFAULT) && \ - ((od) <= PMUX_PIN_OD_ENABLE)) - -enum pmux_pin_ioreset { - PMUX_PIN_IO_RESET_DEFAULT = 0, - PMUX_PIN_IO_RESET_DISABLE, - PMUX_PIN_IO_RESET_ENABLE, -}; -/* return 1 if a pin_ioreset_is in range */ -#define pmux_pin_ioreset_isvalid(ioreset) \ - (((ioreset) >= PMUX_PIN_IO_RESET_DEFAULT) && \ - ((ioreset) <= PMUX_PIN_IO_RESET_ENABLE)) - -enum pmux_pin_rcv_sel { - PMUX_PIN_RCV_SEL_DEFAULT = 0, - PMUX_PIN_RCV_SEL_NORMAL, - PMUX_PIN_RCV_SEL_HIGH, -}; -/* return 1 if a pin_rcv_sel_is in range */ -#define pmux_pin_rcv_sel_isvalid(rcv_sel) \ - (((rcv_sel) >= PMUX_PIN_RCV_SEL_DEFAULT) && \ - ((rcv_sel) <= PMUX_PIN_RCV_SEL_HIGH)) - -#define PGRP_SLWF_NONE -1 -#define PGRP_SLWF_MAX 3 -#define PGRP_SLWR_NONE PGRP_SLWF_NONE -#define PGRP_SLWR_MAX PGRP_SLWF_MAX - -#define PGRP_DRVUP_NONE -1 -#define PGRP_DRVUP_MAX 127 -#define PGRP_DRVDN_NONE PGRP_DRVUP_NONE -#define PGRP_DRVDN_MAX PGRP_DRVUP_MAX - -#define PGRP_SCHMT_NONE -1 -#define PGRP_HSM_NONE PGRP_SCHMT_NONE - -/* return 1 if a padgrp is in range */ -#define pmux_padgrp_isvalid(pd) (((pd) >= 0) && ((pd) < PDRIVE_PINGROUP_COUNT)) - -/* return 1 if a slew-rate rising/falling edge value is in range */ -#define pmux_pad_slw_isvalid(slw) (((slw) == PGRP_SLWF_NONE) || \ - (((slw) >= 0) && ((slw) <= PGRP_SLWF_MAX))) - -/* return 1 if a driver output pull-up/down strength code value is in range */ -#define pmux_pad_drv_isvalid(drv) (((drv) == PGRP_DRVUP_NONE) || \ - (((drv) >= 0) && ((drv) <= PGRP_DRVUP_MAX))) - -/* return 1 if a low-power mode value is in range */ -#define pmux_pad_lpmd_isvalid(lpm) (((lpm) == PGRP_LPMD_NONE) || \ - (((lpm) >= 0) && ((lpm) <= PGRP_LPMD_X))) - -/* Defines a pin group cfg's low-power mode select */ -enum pgrp_lpmd { - PGRP_LPMD_X8 = 0, - PGRP_LPMD_X4, - PGRP_LPMD_X2, - PGRP_LPMD_X, - PGRP_LPMD_NONE = -1, -}; - -/* Defines whether a pin group cfg's schmidt is enabled or not */ -enum pgrp_schmt { - PGRP_SCHMT_DISABLE = 0, - PGRP_SCHMT_ENABLE = 1, -}; - -/* Defines whether a pin group cfg's high-speed mode is enabled or not */ -enum pgrp_hsm { - PGRP_HSM_DISABLE = 0, - PGRP_HSM_ENABLE = 1, -}; - -/* - * This defines the configuration for a pin group's pad control config - */ -struct padctrl_config { - enum pdrive_pingrp padgrp; /* pin group PDRIVE_PINGRP_x */ - int slwf; /* falling edge slew */ - int slwr; /* rising edge slew */ - int drvup; /* pull-up drive strength */ - int drvdn; /* pull-down drive strength */ - enum pgrp_lpmd lpmd; /* low-power mode selection */ - enum pgrp_schmt schmt; /* schmidt enable */ - enum pgrp_hsm hsm; /* high-speed mode enable */ -}; - -/* t114 pin drive group and pin mux registers */ -#define PDRIVE_PINGROUP_OFFSET (0x868 >> 2) -#define PMUX_OFFSET ((0x3000 >> 2) - PDRIVE_PINGROUP_OFFSET - \ - PDRIVE_PINGROUP_COUNT) -struct pmux_tri_ctlr { - uint pmt_reserved0; /* ABP_MISC_PP_ reserved offset 00 */ - uint pmt_reserved1; /* ABP_MISC_PP_ reserved offset 04 */ - uint pmt_strap_opt_a; /* _STRAPPING_OPT_A_0, offset 08 */ - uint pmt_reserved2; /* ABP_MISC_PP_ reserved offset 0C */ - uint pmt_reserved3; /* ABP_MISC_PP_ reserved offset 10 */ - uint pmt_reserved4[4]; /* _TRI_STATE_REG_A/B/C/D in t20 */ - uint pmt_cfg_ctl; /* _CONFIG_CTL_0, offset 24 */ - - uint pmt_reserved[528]; /* ABP_MISC_PP_ reserved offs 28-864 */ - - uint pmt_drive[PDRIVE_PINGROUP_COUNT]; /* pin drive grps offs 868 */ - uint pmt_reserved5[PMUX_OFFSET]; - uint pmt_ctl[PINGRP_COUNT]; /* mux/pupd/tri regs, offset 0x3000 */ -}; - -/* - * This defines the configuration for a pin, including the function assigned, - * pull up/down settings and tristate settings. Having set up one of these - * you can call pinmux_config_pingroup() to configure a pin in one step. Also - * available is pinmux_config_table() to configure a list of pins. - */ -struct pingroup_config { - enum pmux_pingrp pingroup; /* pin group PINGRP_... */ - enum pmux_func func; /* function to assign FUNC_... */ - enum pmux_pull pull; /* pull up/down/normal PMUX_PULL_...*/ - enum pmux_tristate tristate; /* tristate or normal PMUX_TRI_... */ - enum pmux_pin_io io; /* input or output PMUX_PIN_... */ - enum pmux_pin_lock lock; /* lock enable/disable PMUX_PIN... */ - enum pmux_pin_od od; /* open-drain or push-pull driver */ - enum pmux_pin_ioreset ioreset; /* input/output reset PMUX_PIN... */ - enum pmux_pin_rcv_sel rcv_sel; /* select between High and Normal */ - /* VIL/VIH receivers */ -}; - -/* Set a pin group to tristate */ -void pinmux_tristate_enable(enum pmux_pingrp pin); - -/* Set a pin group to normal (non tristate) */ -void pinmux_tristate_disable(enum pmux_pingrp pin); - -/* Set the pull up/down feature for a pin group */ -void pinmux_set_pullupdown(enum pmux_pingrp pin, enum pmux_pull pupd); - -/* Set the mux function for a pin group */ -void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func func); - -/* Set the complete configuration for a pin group */ -void pinmux_config_pingroup(struct pingroup_config *config); - -/* Set a pin group to tristate or normal */ -void pinmux_set_tristate(enum pmux_pingrp pin, int enable); - -/* Set a pin group as input or output */ -void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io); - -/** - * Configure a list of pin groups - * - * @param config List of config items - * @param len Number of config items in list - */ -void pinmux_config_table(struct pingroup_config *config, int len); - -/** - * Set the GP pad configs - * - * @param config List of config items - * @param len Number of config items in list - */ -void padgrp_config_table(struct padctrl_config *config, int len); - -#endif /* _TEGRA114_PINMUX_H_ */ +#endif /* _TEGRA114_PINMUX_H_ */ -- cgit From dfb42fc95df6b5908fb593db9132018233430fe9 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 21 Mar 2014 12:28:56 -0600 Subject: ARM: tegra: pinmux naming consistency fixes Clean up the naming of pinmux-related objects: * Refer to drive groups rather than pad groups to match the Linux kernel. * Ensure all pinmux API types are prefixed with pmux_, values (defines) are prefixed with PMUX_, and functions prefixed with pinmux_. * Modify a few type names to make their content clearer. * Minimal changes to SoC-specific .h/.c files are made so the code still compiles. A separate per-SoC change will be made immediately following, in order to keep individual patch size down. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra114/pinmux.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/include/asm/arch-tegra114/pinmux.h') diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index 00ef542354..0707459335 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -202,10 +202,10 @@ enum pmux_pingrp { PINGRP_SDMMC3_CLK_LB_IN, PINGRP_SDMMC3_CLK_LB_OUT, PINGRP_RESET_OUT_N = PINGRP_SDMMC3_CLK_LB_OUT + 2, - PINGRP_COUNT, + PMUX_PINGRP_COUNT, }; -enum pdrive_pingrp { +enum pmux_drvgrp { PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */ PDRIVE_PINGROUP_AO2, PDRIVE_PINGROUP_AT1, @@ -244,7 +244,7 @@ enum pdrive_pingrp { PDRIVE_PINGROUP_HVC, PDRIVE_PINGROUP_SDIO4, PDRIVE_PINGROUP_AO0, - PDRIVE_PINGROUP_COUNT, + PMUX_DRVGRP_COUNT, }; /* @@ -378,7 +378,7 @@ enum pmux_func { #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC #define TEGRA_PMX_HAS_RCV_SEL -#define TEGRA_PMX_HAS_PADGRPS +#define TEGRA_PMX_HAS_DRVGRPS #include #endif /* _TEGRA114_PINMUX_H_ */ -- cgit From 1fa3a634137c9f40b207cff1079fe0dfbd9b3378 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 21 Mar 2014 12:29:00 -0600 Subject: ARM: tegra: Tegra114 pinmux cleanup This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra114_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted a few entries in pinmux-config-dalmore.h due to this. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra114/pinmux.h | 578 +++++++++++++--------------- 1 file changed, 257 insertions(+), 321 deletions(-) (limited to 'arch/arm/include/asm/arch-tegra114/pinmux.h') diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index 0707459335..0df69e3ab3 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -1,375 +1,311 @@ /* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _TEGRA114_PINMUX_H_ #define _TEGRA114_PINMUX_H_ -/* - * Pin groups which we adjust. There are three basic attributes of each pin - * group which use this enum: - * - * - function - * - pullup / pulldown - * - tristate or normal - */ enum pmux_pingrp { - PINGRP_ULPI_DATA0 = 0, /* offset 0x3000 */ - PINGRP_ULPI_DATA1, - PINGRP_ULPI_DATA2, - PINGRP_ULPI_DATA3, - PINGRP_ULPI_DATA4, - PINGRP_ULPI_DATA5, - PINGRP_ULPI_DATA6, - PINGRP_ULPI_DATA7, - PINGRP_ULPI_CLK, - PINGRP_ULPI_DIR, - PINGRP_ULPI_NXT, - PINGRP_ULPI_STP, - PINGRP_DAP3_FS, - PINGRP_DAP3_DIN, - PINGRP_DAP3_DOUT, - PINGRP_DAP3_SCLK, - PINGRP_GPIO_PV0, - PINGRP_GPIO_PV1, - PINGRP_SDMMC1_CLK, - PINGRP_SDMMC1_CMD, - PINGRP_SDMMC1_DAT3, - PINGRP_SDMMC1_DAT2, - PINGRP_SDMMC1_DAT1, - PINGRP_SDMMC1_DAT0, - PINGRP_CLK2_OUT = PINGRP_SDMMC1_DAT0 + 3, - PINGRP_CLK2_REQ, - PINGRP_HDMI_INT = PINGRP_CLK2_REQ + 41, - PINGRP_DDC_SCL, - PINGRP_DDC_SDA, - PINGRP_UART2_RXD = PINGRP_DDC_SDA + 19, - PINGRP_UART2_TXD, - PINGRP_UART2_RTS_N, - PINGRP_UART2_CTS_N, - PINGRP_UART3_TXD, - PINGRP_UART3_RXD, - PINGRP_UART3_CTS_N, - PINGRP_UART3_RTS_N, - PINGRP_GPIO_PU0, - PINGRP_GPIO_PU1, - PINGRP_GPIO_PU2, - PINGRP_GPIO_PU3, - PINGRP_GPIO_PU4, - PINGRP_GPIO_PU5, - PINGRP_GPIO_PU6, - PINGRP_GEN1_I2C_SDA, - PINGRP_GEN1_I2C_SCL, - PINGRP_DAP4_FS, - PINGRP_DAP4_DIN, - PINGRP_DAP4_DOUT, - PINGRP_DAP4_SCLK, - PINGRP_CLK3_OUT, - PINGRP_CLK3_REQ, - PINGRP_GMI_WP_N, - PINGRP_GMI_IORDY, - PINGRP_GMI_WAIT, - PINGRP_GMI_ADV_N, - PINGRP_GMI_CLK, - PINGRP_GMI_CS0_N, - PINGRP_GMI_CS1_N, - PINGRP_GMI_CS2_N, - PINGRP_GMI_CS3_N, - PINGRP_GMI_CS4_N, - PINGRP_GMI_CS6_N, - PINGRP_GMI_CS7_N, - PINGRP_GMI_AD0, - PINGRP_GMI_AD1, - PINGRP_GMI_AD2, - PINGRP_GMI_AD3, - PINGRP_GMI_AD4, - PINGRP_GMI_AD5, - PINGRP_GMI_AD6, - PINGRP_GMI_AD7, - PINGRP_GMI_AD8, - PINGRP_GMI_AD9, - PINGRP_GMI_AD10, - PINGRP_GMI_AD11, - PINGRP_GMI_AD12, - PINGRP_GMI_AD13, - PINGRP_GMI_AD14, - PINGRP_GMI_AD15, - PINGRP_GMI_A16, - PINGRP_GMI_A17, - PINGRP_GMI_A18, - PINGRP_GMI_A19, - PINGRP_GMI_WR_N, - PINGRP_GMI_OE_N, - PINGRP_GMI_DQS, - PINGRP_GMI_RST_N, - PINGRP_GEN2_I2C_SCL, - PINGRP_GEN2_I2C_SDA, - PINGRP_SDMMC4_CLK, - PINGRP_SDMMC4_CMD, - PINGRP_SDMMC4_DAT0, - PINGRP_SDMMC4_DAT1, - PINGRP_SDMMC4_DAT2, - PINGRP_SDMMC4_DAT3, - PINGRP_SDMMC4_DAT4, - PINGRP_SDMMC4_DAT5, - PINGRP_SDMMC4_DAT6, - PINGRP_SDMMC4_DAT7, - PINGRP_CAM_MCLK = PINGRP_SDMMC4_DAT7 + 2, - PINGRP_GPIO_PCC1, - PINGRP_GPIO_PBB0, - PINGRP_CAM_I2C_SCL, - PINGRP_CAM_I2C_SDA, - PINGRP_GPIO_PBB3, - PINGRP_GPIO_PBB4, - PINGRP_GPIO_PBB5, - PINGRP_GPIO_PBB6, - PINGRP_GPIO_PBB7, - PINGRP_GPIO_PCC2, - PINGRP_JTAG_RTCK, - PINGRP_PWR_I2C_SCL, - PINGRP_PWR_I2C_SDA, - PINGRP_KB_ROW0, - PINGRP_KB_ROW1, - PINGRP_KB_ROW2, - PINGRP_KB_ROW3, - PINGRP_KB_ROW4, - PINGRP_KB_ROW5, - PINGRP_KB_ROW6, - PINGRP_KB_ROW7, - PINGRP_KB_ROW8, - PINGRP_KB_ROW9, - PINGRP_KB_ROW10, - PINGRP_KB_COL0 = PINGRP_KB_ROW10 + 6, - PINGRP_KB_COL1, - PINGRP_KB_COL2, - PINGRP_KB_COL3, - PINGRP_KB_COL4, - PINGRP_KB_COL5, - PINGRP_KB_COL6, - PINGRP_KB_COL7, - PINGRP_CLK_32K_OUT, - PINGRP_SYS_CLK_REQ, - PINGRP_CORE_PWR_REQ, - PINGRP_CPU_PWR_REQ, - PINGRP_PWR_INT_N, - PINGRP_CLK_32K_IN, - PINGRP_OWR, - PINGRP_DAP1_FS, - PINGRP_DAP1_DIN, - PINGRP_DAP1_DOUT, - PINGRP_DAP1_SCLK, - PINGRP_CLK1_REQ, - PINGRP_CLK1_OUT, - PINGRP_SPDIF_IN, - PINGRP_SPDIF_OUT, - PINGRP_DAP2_FS, - PINGRP_DAP2_DIN, - PINGRP_DAP2_DOUT, - PINGRP_DAP2_SCLK, - PINGRP_DVFS_PWM, - PINGRP_GPIO_X1_AUD, - PINGRP_GPIO_X3_AUD, - PINGRP_DVFS_CLK, - PINGRP_GPIO_X4_AUD, - PINGRP_GPIO_X5_AUD, - PINGRP_GPIO_X6_AUD, - PINGRP_GPIO_X7_AUD, - PINGRP_SDMMC3_CLK = PINGRP_GPIO_X7_AUD + 3, - PINGRP_SDMMC3_CMD, - PINGRP_SDMMC3_DAT0, - PINGRP_SDMMC3_DAT1, - PINGRP_SDMMC3_DAT2, - PINGRP_SDMMC3_DAT3, - PINGRP_HDMI_CEC = PINGRP_SDMMC3_DAT3 + 15, /* offset 0x33e0 */ - PINGRP_SDMMC1_WP_N, - PINGRP_SDMMC3_CD_N, - PINGRP_GPIO_W2_AUD, - PINGRP_GPIO_W3_AUD, - PINGRP_USB_VBUS_EN0, /* offset 0x33f4 */ - PINGRP_USB_VBUS_EN1, - PINGRP_SDMMC3_CLK_LB_IN, - PINGRP_SDMMC3_CLK_LB_OUT, - PINGRP_RESET_OUT_N = PINGRP_SDMMC3_CLK_LB_OUT + 2, + PMUX_PINGRP_ULPI_DATA0_PO1, + PMUX_PINGRP_ULPI_DATA1_PO2, + PMUX_PINGRP_ULPI_DATA2_PO3, + PMUX_PINGRP_ULPI_DATA3_PO4, + PMUX_PINGRP_ULPI_DATA4_PO5, + PMUX_PINGRP_ULPI_DATA5_PO6, + PMUX_PINGRP_ULPI_DATA6_PO7, + PMUX_PINGRP_ULPI_DATA7_PO0, + PMUX_PINGRP_ULPI_CLK_PY0, + PMUX_PINGRP_ULPI_DIR_PY1, + PMUX_PINGRP_ULPI_NXT_PY2, + PMUX_PINGRP_ULPI_STP_PY3, + PMUX_PINGRP_DAP3_FS_PP0, + PMUX_PINGRP_DAP3_DIN_PP1, + PMUX_PINGRP_DAP3_DOUT_PP2, + PMUX_PINGRP_DAP3_SCLK_PP3, + PMUX_PINGRP_PV0, + PMUX_PINGRP_PV1, + PMUX_PINGRP_SDMMC1_CLK_PZ0, + PMUX_PINGRP_SDMMC1_CMD_PZ1, + PMUX_PINGRP_SDMMC1_DAT3_PY4, + PMUX_PINGRP_SDMMC1_DAT2_PY5, + PMUX_PINGRP_SDMMC1_DAT1_PY6, + PMUX_PINGRP_SDMMC1_DAT0_PY7, + PMUX_PINGRP_CLK2_OUT_PW5 = (0x68 / 4), + PMUX_PINGRP_CLK2_REQ_PCC5, + PMUX_PINGRP_HDMI_INT_PN7 = (0x110 / 4), + PMUX_PINGRP_DDC_SCL_PV4, + PMUX_PINGRP_DDC_SDA_PV5, + PMUX_PINGRP_UART2_RXD_PC3 = (0x164 / 4), + PMUX_PINGRP_UART2_TXD_PC2, + PMUX_PINGRP_UART2_RTS_N_PJ6, + PMUX_PINGRP_UART2_CTS_N_PJ5, + PMUX_PINGRP_UART3_TXD_PW6, + PMUX_PINGRP_UART3_RXD_PW7, + PMUX_PINGRP_UART3_CTS_N_PA1, + PMUX_PINGRP_UART3_RTS_N_PC0, + PMUX_PINGRP_PU0, + PMUX_PINGRP_PU1, + PMUX_PINGRP_PU2, + PMUX_PINGRP_PU3, + PMUX_PINGRP_PU4, + PMUX_PINGRP_PU5, + PMUX_PINGRP_PU6, + PMUX_PINGRP_GEN1_I2C_SDA_PC5, + PMUX_PINGRP_GEN1_I2C_SCL_PC4, + PMUX_PINGRP_DAP4_FS_PP4, + PMUX_PINGRP_DAP4_DIN_PP5, + PMUX_PINGRP_DAP4_DOUT_PP6, + PMUX_PINGRP_DAP4_SCLK_PP7, + PMUX_PINGRP_CLK3_OUT_PEE0, + PMUX_PINGRP_CLK3_REQ_PEE1, + PMUX_PINGRP_GMI_WP_N_PC7, + PMUX_PINGRP_GMI_IORDY_PI5, + PMUX_PINGRP_GMI_WAIT_PI7, + PMUX_PINGRP_GMI_ADV_N_PK0, + PMUX_PINGRP_GMI_CLK_PK1, + PMUX_PINGRP_GMI_CS0_N_PJ0, + PMUX_PINGRP_GMI_CS1_N_PJ2, + PMUX_PINGRP_GMI_CS2_N_PK3, + PMUX_PINGRP_GMI_CS3_N_PK4, + PMUX_PINGRP_GMI_CS4_N_PK2, + PMUX_PINGRP_GMI_CS6_N_PI3, + PMUX_PINGRP_GMI_CS7_N_PI6, + PMUX_PINGRP_GMI_AD0_PG0, + PMUX_PINGRP_GMI_AD1_PG1, + PMUX_PINGRP_GMI_AD2_PG2, + PMUX_PINGRP_GMI_AD3_PG3, + PMUX_PINGRP_GMI_AD4_PG4, + PMUX_PINGRP_GMI_AD5_PG5, + PMUX_PINGRP_GMI_AD6_PG6, + PMUX_PINGRP_GMI_AD7_PG7, + PMUX_PINGRP_GMI_AD8_PH0, + PMUX_PINGRP_GMI_AD9_PH1, + PMUX_PINGRP_GMI_AD10_PH2, + PMUX_PINGRP_GMI_AD11_PH3, + PMUX_PINGRP_GMI_AD12_PH4, + PMUX_PINGRP_GMI_AD13_PH5, + PMUX_PINGRP_GMI_AD14_PH6, + PMUX_PINGRP_GMI_AD15_PH7, + PMUX_PINGRP_GMI_A16_PJ7, + PMUX_PINGRP_GMI_A17_PB0, + PMUX_PINGRP_GMI_A18_PB1, + PMUX_PINGRP_GMI_A19_PK7, + PMUX_PINGRP_GMI_WR_N_PI0, + PMUX_PINGRP_GMI_OE_N_PI1, + PMUX_PINGRP_GMI_DQS_P_PJ3, + PMUX_PINGRP_GMI_RST_N_PI4, + PMUX_PINGRP_GEN2_I2C_SCL_PT5, + PMUX_PINGRP_GEN2_I2C_SDA_PT6, + PMUX_PINGRP_SDMMC4_CLK_PCC4, + PMUX_PINGRP_SDMMC4_CMD_PT7, + PMUX_PINGRP_SDMMC4_DAT0_PAA0, + PMUX_PINGRP_SDMMC4_DAT1_PAA1, + PMUX_PINGRP_SDMMC4_DAT2_PAA2, + PMUX_PINGRP_SDMMC4_DAT3_PAA3, + PMUX_PINGRP_SDMMC4_DAT4_PAA4, + PMUX_PINGRP_SDMMC4_DAT5_PAA5, + PMUX_PINGRP_SDMMC4_DAT6_PAA6, + PMUX_PINGRP_SDMMC4_DAT7_PAA7, + PMUX_PINGRP_CAM_MCLK_PCC0 = (0x284 / 4), + PMUX_PINGRP_PCC1, + PMUX_PINGRP_PBB0, + PMUX_PINGRP_CAM_I2C_SCL_PBB1, + PMUX_PINGRP_CAM_I2C_SDA_PBB2, + PMUX_PINGRP_PBB3, + PMUX_PINGRP_PBB4, + PMUX_PINGRP_PBB5, + PMUX_PINGRP_PBB6, + PMUX_PINGRP_PBB7, + PMUX_PINGRP_PCC2, + PMUX_PINGRP_JTAG_RTCK, + PMUX_PINGRP_PWR_I2C_SCL_PZ6, + PMUX_PINGRP_PWR_I2C_SDA_PZ7, + PMUX_PINGRP_KB_ROW0_PR0, + PMUX_PINGRP_KB_ROW1_PR1, + PMUX_PINGRP_KB_ROW2_PR2, + PMUX_PINGRP_KB_ROW3_PR3, + PMUX_PINGRP_KB_ROW4_PR4, + PMUX_PINGRP_KB_ROW5_PR5, + PMUX_PINGRP_KB_ROW6_PR6, + PMUX_PINGRP_KB_ROW7_PR7, + PMUX_PINGRP_KB_ROW8_PS0, + PMUX_PINGRP_KB_ROW9_PS1, + PMUX_PINGRP_KB_ROW10_PS2, + PMUX_PINGRP_KB_COL0_PQ0 = (0x2fc / 4), + PMUX_PINGRP_KB_COL1_PQ1, + PMUX_PINGRP_KB_COL2_PQ2, + PMUX_PINGRP_KB_COL3_PQ3, + PMUX_PINGRP_KB_COL4_PQ4, + PMUX_PINGRP_KB_COL5_PQ5, + PMUX_PINGRP_KB_COL6_PQ6, + PMUX_PINGRP_KB_COL7_PQ7, + PMUX_PINGRP_CLK_32K_OUT_PA0, + PMUX_PINGRP_SYS_CLK_REQ_PZ5, + PMUX_PINGRP_CORE_PWR_REQ, + PMUX_PINGRP_CPU_PWR_REQ, + PMUX_PINGRP_PWR_INT_N, + PMUX_PINGRP_CLK_32K_IN, + PMUX_PINGRP_OWR, + PMUX_PINGRP_DAP1_FS_PN0, + PMUX_PINGRP_DAP1_DIN_PN1, + PMUX_PINGRP_DAP1_DOUT_PN2, + PMUX_PINGRP_DAP1_SCLK_PN3, + PMUX_PINGRP_CLK1_REQ_PEE2, + PMUX_PINGRP_CLK1_OUT_PW4, + PMUX_PINGRP_SPDIF_IN_PK6, + PMUX_PINGRP_SPDIF_OUT_PK5, + PMUX_PINGRP_DAP2_FS_PA2, + PMUX_PINGRP_DAP2_DIN_PA4, + PMUX_PINGRP_DAP2_DOUT_PA5, + PMUX_PINGRP_DAP2_SCLK_PA3, + PMUX_PINGRP_DVFS_PWM_PX0, + PMUX_PINGRP_GPIO_X1_AUD_PX1, + PMUX_PINGRP_GPIO_X3_AUD_PX3, + PMUX_PINGRP_DVFS_CLK_PX2, + PMUX_PINGRP_GPIO_X4_AUD_PX4, + PMUX_PINGRP_GPIO_X5_AUD_PX5, + PMUX_PINGRP_GPIO_X6_AUD_PX6, + PMUX_PINGRP_GPIO_X7_AUD_PX7, + PMUX_PINGRP_SDMMC3_CLK_PA6 = (0x390 / 4), + PMUX_PINGRP_SDMMC3_CMD_PA7, + PMUX_PINGRP_SDMMC3_DAT0_PB7, + PMUX_PINGRP_SDMMC3_DAT1_PB6, + PMUX_PINGRP_SDMMC3_DAT2_PB5, + PMUX_PINGRP_SDMMC3_DAT3_PB4, + PMUX_PINGRP_HDMI_CEC_PEE3 = (0x3e0 / 4), + PMUX_PINGRP_SDMMC1_WP_N_PV3, + PMUX_PINGRP_SDMMC3_CD_N_PV2, + PMUX_PINGRP_GPIO_W2_AUD_PW2, + PMUX_PINGRP_GPIO_W3_AUD_PW3, + PMUX_PINGRP_USB_VBUS_EN0_PN4, + PMUX_PINGRP_USB_VBUS_EN1_PN5, + PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5, + PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4, + PMUX_PINGRP_GMI_CLK_LB, + PMUX_PINGRP_RESET_OUT_N, PMUX_PINGRP_COUNT, }; enum pmux_drvgrp { - PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */ - PDRIVE_PINGROUP_AO2, - PDRIVE_PINGROUP_AT1, - PDRIVE_PINGROUP_AT2, - PDRIVE_PINGROUP_AT3, - PDRIVE_PINGROUP_AT4, - PDRIVE_PINGROUP_AT5, - PDRIVE_PINGROUP_CDEV1, - PDRIVE_PINGROUP_CDEV2, - PDRIVE_PINGROUP_DAP1 = 10, /* offset 0x890 */ - PDRIVE_PINGROUP_DAP2, - PDRIVE_PINGROUP_DAP3, - PDRIVE_PINGROUP_DAP4, - PDRIVE_PINGROUP_DBG, - PDRIVE_PINGROUP_SDIO3 = 18, /* offset 0x8B0 */ - PDRIVE_PINGROUP_SPI, - PDRIVE_PINGROUP_UAA, - PDRIVE_PINGROUP_UAB, - PDRIVE_PINGROUP_UART2, - PDRIVE_PINGROUP_UART3, - PDRIVE_PINGROUP_SDIO1 = 33, /* offset 0x8EC */ - PDRIVE_PINGROUP_DDC = 37, /* offset 0x8FC */ - PDRIVE_PINGROUP_GMA, - PDRIVE_PINGROUP_GME = 42, /* offset 0x910 */ - PDRIVE_PINGROUP_GMF, - PDRIVE_PINGROUP_GMG, - PDRIVE_PINGROUP_GMH, - PDRIVE_PINGROUP_OWR, - PDRIVE_PINGROUP_UAD, - PDRIVE_PINGROUP_DEV3 = 49, /* offset 0x92c */ - PDRIVE_PINGROUP_CEC = 52, /* offset 0x938 */ - PDRIVE_PINGROUP_AT6 = 75, /* offset 0x994 */ - PDRIVE_PINGROUP_DAP5, - PDRIVE_PINGROUP_VBUS, - PDRIVE_PINGROUP_AO3, - PDRIVE_PINGROUP_HVC, - PDRIVE_PINGROUP_SDIO4, - PDRIVE_PINGROUP_AO0, + PMUX_DRVGRP_AO1, + PMUX_DRVGRP_AO2, + PMUX_DRVGRP_AT1, + PMUX_DRVGRP_AT2, + PMUX_DRVGRP_AT3, + PMUX_DRVGRP_AT4, + PMUX_DRVGRP_AT5, + PMUX_DRVGRP_CDEV1, + PMUX_DRVGRP_CDEV2, + PMUX_DRVGRP_DAP1 = (0x28 / 4), + PMUX_DRVGRP_DAP2, + PMUX_DRVGRP_DAP3, + PMUX_DRVGRP_DAP4, + PMUX_DRVGRP_DBG, + PMUX_DRVGRP_SDIO3 = (0x48 / 4), + PMUX_DRVGRP_SPI, + PMUX_DRVGRP_UAA, + PMUX_DRVGRP_UAB, + PMUX_DRVGRP_UART2, + PMUX_DRVGRP_UART3, + PMUX_DRVGRP_SDIO1 = (0x84 / 4), + PMUX_DRVGRP_DDC = (0x94 / 4), + PMUX_DRVGRP_GMA, + PMUX_DRVGRP_GME = (0xa8 / 4), + PMUX_DRVGRP_GMF, + PMUX_DRVGRP_GMG, + PMUX_DRVGRP_GMH, + PMUX_DRVGRP_OWR, + PMUX_DRVGRP_UDA, + PMUX_DRVGRP_DEV3 = (0xc4 / 4), + PMUX_DRVGRP_CEC = (0xd0 / 4), + PMUX_DRVGRP_AT6 = (0x12c / 4), + PMUX_DRVGRP_DAP5, + PMUX_DRVGRP_USB_VBUS_EN, + PMUX_DRVGRP_AO3, + PMUX_DRVGRP_HV0, + PMUX_DRVGRP_SDIO4, + PMUX_DRVGRP_AO0, PMUX_DRVGRP_COUNT, }; -/* - * Functions which can be assigned to each of the pin groups. The values here - * bear no relation to the values programmed into pinmux registers and are - * purely a convenience. The translation is done through a table search. - */ enum pmux_func { - PMUX_FUNC_AHB_CLK, - PMUX_FUNC_APB_CLK, - PMUX_FUNC_AUDIO_SYNC, - PMUX_FUNC_CRT, - PMUX_FUNC_DAP1, - PMUX_FUNC_DAP2, - PMUX_FUNC_DAP3, - PMUX_FUNC_DAP4, - PMUX_FUNC_DAP5, - PMUX_FUNC_DISPA, - PMUX_FUNC_DISPB, - PMUX_FUNC_EMC_TEST0_DLL, - PMUX_FUNC_EMC_TEST1_DLL, - PMUX_FUNC_GMI, - PMUX_FUNC_GMI_INT, - PMUX_FUNC_HDMI, - PMUX_FUNC_I2C1, - PMUX_FUNC_I2C2, - PMUX_FUNC_I2C3, - PMUX_FUNC_IDE, - PMUX_FUNC_KBC, - PMUX_FUNC_MIO, - PMUX_FUNC_MIPI_HS, - PMUX_FUNC_NAND, - PMUX_FUNC_OSC, - PMUX_FUNC_OWR, - PMUX_FUNC_PCIE, - PMUX_FUNC_PLLA_OUT, - PMUX_FUNC_PLLC_OUT1, - PMUX_FUNC_PLLM_OUT1, - PMUX_FUNC_PLLP_OUT2, - PMUX_FUNC_PLLP_OUT3, - PMUX_FUNC_PLLP_OUT4, - PMUX_FUNC_PWM, - PMUX_FUNC_PWR_INTR, - PMUX_FUNC_PWR_ON, - PMUX_FUNC_RTCK, - PMUX_FUNC_SDMMC1, - PMUX_FUNC_SDMMC2, - PMUX_FUNC_SDMMC3, - PMUX_FUNC_SDMMC4, - PMUX_FUNC_SFLASH, - PMUX_FUNC_SPDIF, - PMUX_FUNC_SPI1, - PMUX_FUNC_SPI2, - PMUX_FUNC_SPI2_ALT, - PMUX_FUNC_SPI3, - PMUX_FUNC_SPI4, - PMUX_FUNC_TRACE, - PMUX_FUNC_TWC, - PMUX_FUNC_UARTA, - PMUX_FUNC_UARTB, - PMUX_FUNC_UARTC, - PMUX_FUNC_UARTD, - PMUX_FUNC_UARTE, - PMUX_FUNC_ULPI, - PMUX_FUNC_VI, - PMUX_FUNC_VI_SENSOR_CLK, - PMUX_FUNC_XIO, - /* End of Tegra2 MUX selectors */ PMUX_FUNC_BLINK, PMUX_FUNC_CEC, + PMUX_FUNC_CLDVFS, + PMUX_FUNC_CLK, PMUX_FUNC_CLK12, + PMUX_FUNC_CPU, PMUX_FUNC_DAP, - PMUX_FUNC_DAPSDMMC2, - PMUX_FUNC_DDR, + PMUX_FUNC_DAP1, + PMUX_FUNC_DAP2, PMUX_FUNC_DEV3, + PMUX_FUNC_DISPLAYA, + PMUX_FUNC_DISPLAYA_ALT, + PMUX_FUNC_DISPLAYB, PMUX_FUNC_DTV, - PMUX_FUNC_VI_ALT1, - PMUX_FUNC_VI_ALT2, - PMUX_FUNC_VI_ALT3, PMUX_FUNC_EMC_DLL, PMUX_FUNC_EXTPERIPH1, PMUX_FUNC_EXTPERIPH2, PMUX_FUNC_EXTPERIPH3, + PMUX_FUNC_GMI, PMUX_FUNC_GMI_ALT, PMUX_FUNC_HDA, PMUX_FUNC_HSI, + PMUX_FUNC_I2C1, + PMUX_FUNC_I2C2, + PMUX_FUNC_I2C3, PMUX_FUNC_I2C4, - PMUX_FUNC_I2C5, PMUX_FUNC_I2CPWR, PMUX_FUNC_I2S0, PMUX_FUNC_I2S1, PMUX_FUNC_I2S2, PMUX_FUNC_I2S3, PMUX_FUNC_I2S4, + PMUX_FUNC_IRDA, + PMUX_FUNC_KBC, + PMUX_FUNC_NAND, PMUX_FUNC_NAND_ALT, - PMUX_FUNC_POPSDIO4, - PMUX_FUNC_POPSDMMC4, + PMUX_FUNC_OWR, + PMUX_FUNC_PMI, PMUX_FUNC_PWM0, PMUX_FUNC_PWM1, PMUX_FUNC_PWM2, PMUX_FUNC_PWM3, - PMUX_FUNC_SATA, + PMUX_FUNC_PWRON, + PMUX_FUNC_RESET_OUT_N, + PMUX_FUNC_RTCK, + PMUX_FUNC_SDMMC1, + PMUX_FUNC_SDMMC2, + PMUX_FUNC_SDMMC3, + PMUX_FUNC_SDMMC4, + PMUX_FUNC_SOC, + PMUX_FUNC_SPDIF, + PMUX_FUNC_SPI1, + PMUX_FUNC_SPI2, + PMUX_FUNC_SPI3, + PMUX_FUNC_SPI4, PMUX_FUNC_SPI5, PMUX_FUNC_SPI6, PMUX_FUNC_SYSCLK, + PMUX_FUNC_TRACE, + PMUX_FUNC_UARTA, + PMUX_FUNC_UARTB, + PMUX_FUNC_UARTC, + PMUX_FUNC_UARTD, + PMUX_FUNC_ULPI, + PMUX_FUNC_USB, PMUX_FUNC_VGP1, PMUX_FUNC_VGP2, PMUX_FUNC_VGP3, PMUX_FUNC_VGP4, PMUX_FUNC_VGP5, PMUX_FUNC_VGP6, - /* End of Tegra3 MUX selectors */ - PMUX_FUNC_USB, - PMUX_FUNC_SOC, - PMUX_FUNC_CPU, - PMUX_FUNC_CLK, - PMUX_FUNC_PWRON, - PMUX_FUNC_PMI, - PMUX_FUNC_CLDVFS, - PMUX_FUNC_RESET_OUT_N, - /* End of Tegra114 MUX selectors */ - + PMUX_FUNC_VI, + PMUX_FUNC_VI_ALT1, + PMUX_FUNC_VI_ALT3, PMUX_FUNC_COUNT, - - PMUX_FUNC_INVALID = 0x4000, PMUX_FUNC_RSVD1 = 0x8000, PMUX_FUNC_RSVD2 = 0x8001, PMUX_FUNC_RSVD3 = 0x8002, -- cgit From d381294aef4a5b6ddeda3685519330a5b73d884f Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 21 Mar 2014 15:58:03 -0600 Subject: ARM: tegra: pack pinmux data tables tighter Use smaller fields in the Tegra pinmux structures in order to pack the data tables into a smaller space. This saves around 1-3KB for the SPL and around 3-8KB for the main build of U-Boot, depending on the board, which SoC it uses, and how many pinmux table entries there are. In order to pack PMUX_FUNC_* into a smaller space, don't hard-code the values of PMUX_FUNC_RSVD* to values which require 16 bits to store them, but instead let their values be assigned automatically, so they end up fitting into 8 bits. Signed-off-by: Stephen Warren Acked-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra114/pinmux.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/include/asm/arch-tegra114/pinmux.h') diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h index 0df69e3ab3..c1cb3ef16b 100644 --- a/arch/arm/include/asm/arch-tegra114/pinmux.h +++ b/arch/arm/include/asm/arch-tegra114/pinmux.h @@ -305,11 +305,11 @@ enum pmux_func { PMUX_FUNC_VI, PMUX_FUNC_VI_ALT1, PMUX_FUNC_VI_ALT3, + PMUX_FUNC_RSVD1, + PMUX_FUNC_RSVD2, + PMUX_FUNC_RSVD3, + PMUX_FUNC_RSVD4, PMUX_FUNC_COUNT, - PMUX_FUNC_RSVD1 = 0x8000, - PMUX_FUNC_RSVD2 = 0x8001, - PMUX_FUNC_RSVD3 = 0x8002, - PMUX_FUNC_RSVD4 = 0x8003, }; #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC -- cgit