From b1d615f3f10294c016cc424ef05e938f49af8117 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Sun, 2 Mar 2014 19:46:49 +0100 Subject: usb: tegra: fix PHY configuration On Tegra30 and later, the PTS (parallel transceiver select) and STS (serial transceiver select) are part of the HOSTPC1_DEVLC_0 register rather than PORTSC1_0 register. Since the reset configuration usually matches the intended configuration, this error did not show up on Tegra30 devices. Also use the slightly different bit fields of first USB, (USBD) on Tegra20 and move those definitions to the Tegra20 specific header file. Reviewed-by: Stephen Warren Signed-off-by: Stefan Agner Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra/usb.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/arm/include/asm/arch-tegra') diff --git a/arch/arm/include/asm/arch-tegra/usb.h b/arch/arm/include/asm/arch-tegra/usb.h index a1efd07c7d..35d14e977f 100644 --- a/arch/arm/include/asm/arch-tegra/usb.h +++ b/arch/arm/include/asm/arch-tegra/usb.h @@ -91,11 +91,6 @@ /* USBx_CONTROLLER_2_USB2D_ICUSB_CTRL_0 */ #define IC_ENB1 (1 << 3) -/* PORTSC1, USB1, defined for Tegra20 */ -#define PTS1_SHIFT 31 -#define PTS1_MASK (1 << PTS1_SHIFT) -#define STS1 (1 << 30) - #define PTS_UTMI 0 #define PTS_RESERVED 1 #define PTS_ULPI 2 -- cgit