From af104ae5b87c8efb107ac282d09927d8346dc94f Mon Sep 17 00:00:00 2001 From: Eran Matityahu Date: Thu, 14 Dec 2017 20:20:02 +0200 Subject: imx: spl: Fix NAND bootmode detection commit 20f14714169 ("imx: spl: Update NAND bootmode detection bit") broke the NAND bootmode detection by checking if BOOT_CFG1[7:4] == 0x8 for NAND boot mode. This commit essentially reverts it, while using the IMX6_BMODE_* macros that were introduced since. Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not necessarily 0x0 in this case. Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf, like it was in the code before. Signed-off-by: Eran Matityahu Cc: Stefano Babic Cc: Jagan Teki Cc: Tim Harvey --- arch/arm/include/asm/mach-imx/sys_proto.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/include/asm/mach-imx/sys_proto.h') diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 5184e00972..d518e03809 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -81,7 +81,8 @@ enum imx6_bmode { IMX6_BMODE_ESD, IMX6_BMODE_MMC, IMX6_BMODE_EMMC, - IMX6_BMODE_NAND, + IMX6_BMODE_NAND_MIN, + IMX6_BMODE_NAND_MAX = 0xf, }; static inline u8 imx6_is_bmode_from_gpr9(void) -- cgit