From 6fae6a1fd6bf5001a372701e0764ab0820760d55 Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Mon, 27 Aug 2018 17:33:57 +0300 Subject: armv8: fsl-layerscape: add missing qe base address define Add define for QUICC Engine register block base address. Signed-off-by: Laurentiu Tudor [York S: revised commit message] Reviewed-by: York Sun --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/include/asm') diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index be0a6ae363..8c10526a6c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -85,6 +85,8 @@ #define GPIO3_BASE_ADDR (CONFIG_SYS_IMMR + 0x1320000) #define GPIO4_BASE_ADDR (CONFIG_SYS_IMMR + 0x1330000) +#define QE_BASE_ADDR (CONFIG_SYS_IMMR + 0x1400000) + #define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000) #define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c00000) -- cgit