From 7beaf8b6903f2ef4ab8d1d36ee4b0ea4e8611ffd Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 10 Aug 2015 16:52:55 +0530 Subject: ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2 Enabled clocks for the second dwc3 controller and second USB PHY present in DRA7. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Tom Rini --- arch/arm/include/asm/arch-omap5/clock.h | 3 +++ arch/arm/include/asm/omap_common.h | 2 ++ 2 files changed, 5 insertions(+) (limited to 'arch/arm/include/asm') diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index f8e5630bcb..38d50d614f 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -172,6 +172,9 @@ /* CM_COREAON_USB_PHY_CORE_CLKCTRL */ #define USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) +/* CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL */ +#define L3INIT_CLKCTRL_OPTFCLKEN_60M_GFCLK (1 << 8) + /* CM_L3INIT_USB_OTG_SS_CLKCTRL */ #define OTG_SS_CLKCTRL_MODULEMODE_HW (1 << 0) #define OPTFCLKEN_REFCLK960M (1 << 8) diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 2461667b27..37117e2827 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -145,6 +145,7 @@ struct prcm_regs { u32 cm_ssc_modfreqdiv_dpll_unipro; u32 cm_coreaon_usb_phy1_core_clkctrl; u32 cm_coreaon_usb_phy2_core_clkctrl; + u32 cm_coreaon_l3init_60m_gfclk_clkctrl; /* cm2.core */ u32 cm_coreaon_bandgap_clkctrl; @@ -231,6 +232,7 @@ struct prcm_regs { u32 cm_l3init_ocp2scp1_clkctrl; u32 cm_l3init_ocp2scp3_clkctrl; u32 cm_l3init_usb_otg_ss1_clkctrl; + u32 cm_l3init_usb_otg_ss2_clkctrl; u32 prm_irqstatus_mpu_2; -- cgit