From dd2ad2f1318975da1cf64cf95a4a3b3ed44172a5 Mon Sep 17 00:00:00 2001 From: Yuan Yao Date: Thu, 1 Dec 2016 10:13:52 +0800 Subject: armv8: QSPI: Add AHB bus 16MB+ size support The default configuration for QSPI AHB bus can't support 16MB+. But some flash on NXP layerscape board are more than 16MB. Signed-off-by: Yuan Yao Reviewed-by: York Sun --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 + arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm/include/asm') diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index d684a07730..b3cfd89a4b 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -18,6 +18,7 @@ #define CONFIG_SYS_CCI400_ADDR (CONFIG_SYS_IMMR + 0x00180000) #define CONFIG_SYS_GIC400_ADDR (CONFIG_SYS_IMMR + 0x00400000) #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000) +#define SYS_FSL_QSPI_ADDR (CONFIG_SYS_IMMR + 0x00550000) #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000) #define CONFIG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x00510000) #define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 2df56f7a5b..e18dcbdd09 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -19,6 +19,7 @@ #define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR (CONFIG_SYS_IMMR + 0x00300000) #define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR (CONFIG_SYS_IMMR + 0x00310000) #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR (CONFIG_SYS_IMMR + 0x00370000) +#define SYS_FSL_QSPI_ADDR (CONFIG_SYS_IMMR + 0x010c0000) #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x01140000) #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x01240000) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011C0500) -- cgit