From 481549f8c1fa3a40729d0ff15c25380a043b6d41 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sun, 16 Nov 2014 12:47:00 +0100 Subject: arm: socfpga: Add missing DW master SPI clock prototyp to clock_manager.h Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Acked-by: Pavel Machek --- arch/arm/include/asm/arch-socfpga/clock_manager.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-socfpga/clock_manager.h b/arch/arm/include/asm/arch-socfpga/clock_manager.h index fa49f6a998..5449726180 100644 --- a/arch/arm/include/asm/arch-socfpga/clock_manager.h +++ b/arch/arm/include/asm/arch-socfpga/clock_manager.h @@ -14,6 +14,7 @@ unsigned long cm_get_sdram_clk_hz(void); unsigned int cm_get_l4_sp_clk_hz(void); unsigned int cm_get_mmc_controller_clk_hz(void); unsigned int cm_get_qspi_controller_clk_hz(void); +unsigned int cm_get_spi_controller_clk_hz(void); #endif typedef struct { -- cgit From 5d2f930de0e5222957e103c8eb5df2b7238dd4b4 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 26 Nov 2014 12:14:32 -0600 Subject: socfpga: add missing struct member fifo_triple_byte socfpga_scan_manager structure was missing a data member. Signed-off-by: Dinh Nguyen Cc: Vince Bridgers Cc: Chin Liang See Cc: Marek Vasut Acked-by: Pavel Machek Cc: Wolfgang Denk --- arch/arm/include/asm/arch-socfpga/scan_manager.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-socfpga/scan_manager.h b/arch/arm/include/asm/arch-socfpga/scan_manager.h index b2686d3cdb..1155fd3dec 100644 --- a/arch/arm/include/asm/arch-socfpga/scan_manager.h +++ b/arch/arm/include/asm/arch-socfpga/scan_manager.h @@ -13,6 +13,7 @@ struct socfpga_scan_manager { u32 padding[2]; u32 fifo_single_byte; u32 fifo_double_byte; + u32 fifo_triple_byte; u32 fifo_quad_byte; }; -- cgit From b9b5cf0ea3c5c141f31cc0c4c8edebbfd9ff5866 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Wed, 26 Nov 2014 12:14:33 -0600 Subject: socfpga: correctly increment freeze_controller_base address Correctly increment the base address of the freeze controller. And since SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the include file. Signed-off-by: Dinh Nguyen Cc: Vince Bridgers Cc: Chin Liang See Cc: Marek Vasut Acked-by: Pavel Machek Cc: Wolfgang Denk --- arch/arm/include/asm/arch-socfpga/freeze_controller.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-socfpga/freeze_controller.h b/arch/arm/include/asm/arch-socfpga/freeze_controller.h index 120f20e038..f19ad87717 100644 --- a/arch/arm/include/asm/arch-socfpga/freeze_controller.h +++ b/arch/arm/include/asm/arch-socfpga/freeze_controller.h @@ -42,7 +42,6 @@ typedef enum { #define SYSMGR_FRZCTRL_HWCTRL_VIO1REQ_MASK 0x00000001 #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_FROZEN 0x2 #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_THAWED 0x1 -#define SYSMGR_FRZCTRL_VIOCTRL_SHIFT 0x2 void sys_mgr_frzctrl_freeze_req(void); void sys_mgr_frzctrl_thaw_req(void); -- cgit