From a765bdd1cbf576b71502635cf1ebfb28fbad034e Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 15 Nov 2016 16:15:42 +0530 Subject: net: zynq_gem: Use clock driver for ZynqMP Enable and use the clock driver routine defined in clock driver toset required clock appropriately. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 1db2bd6a4f..95fd91da29 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -8,10 +8,12 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H +#ifndef CONFIG_CLK_ZYNQMP /* Setup clk for network */ static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate) { } +#endif int zynq_slcr_get_mio_pin_status(const char *periph); -- cgit From 509d4b9545d82179d5854eddb928c0055702dc67 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 9 Jan 2017 10:05:16 +0100 Subject: ARM64: zynqmp: Generate handoff structure for ATF Xilinx ATF extending options for passing images from BL2(FSBL) to BL31. U-Boot SPL is FSBL replacement that's why it should generate handoff structure the same. Support only one entry which is U-Boot in EL2 itself. When FIT image is adopted structure generate should be data driven. Currently ATF is placing this structure at the beggining of OCM which is rewriting early parts of ATF which should be unused at that time. Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/hardware.h | 9 +++++++++ arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 ++ 2 files changed, 11 insertions(+) (limited to 'arch/arm/include') diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 041b43cfe0..cf187f3111 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -144,4 +144,13 @@ struct csu_regs { #define csu_base ((struct csu_regs *)ZYNQMP_CSU_BASEADDR) +#define ZYNQMP_PMU_BASEADDR 0xFFD80000 + +struct pmu_regs { + u32 reserved[18]; + u32 gen_storage6; /* 0x48 */ +}; + +#define pmu_base ((struct pmu_regs *)ZYNQMP_PMU_BASEADDR) + #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 95fd91da29..8c54fcedf4 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -21,4 +21,6 @@ unsigned int zynqmp_get_silicon_version(void); void psu_init(void); +void handoff_setup(void); + #endif /* _ASM_ARCH_SYS_PROTO_H */ -- cgit