From 1ee30aeed47724eb7c8f145f064b8d03cd294808 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 16 Sep 2014 11:08:46 -0400 Subject: Revert "ARM: SPL: do not set gd again" At the high level, the problem is that we set gd multiple times (and still do, even after the commit we're reverting). We set important parts of gd to the copy which is not above stack but rather in the data section. For the release, we're going to revert this change and for the next release we shall correct things to only, really, set gd once to an appropriate location and ensure that comments about it are correct too. This reverts commit f0c3a6c4ad09210d5d4aeafe87685ee75e5683d6. Acked-by: Albert Aribaud Signed-off-by: Tom Rini --- arch/arm/lib/spl.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/lib') diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c index 75ab546923..dfcc596815 100644 --- a/arch/arm/lib/spl.c +++ b/arch/arm/lib/spl.c @@ -28,6 +28,9 @@ void __weak board_init_f(ulong dummy) /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); + /* Set global data pointer. */ + gd = &gdata; + board_init_r(NULL, 0); } -- cgit From 40f8dec54d7803975aed1c88327002c95ea99908 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 8 Sep 2014 12:20:00 -0700 Subject: armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page Secondary cores need to be released from holdoff by boot release registers. With GPP bootrom, they can boot from main memory directly. Individual spin table is used for each core. Spin table and the boot page is reserved in device tree so OS won't overwrite. Signed-off-by: York Sun Signed-off-by: Arnab Basu --- arch/arm/lib/gic_64.S | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'arch/arm/lib') diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S index d56396ea22..a3e18f7713 100644 --- a/arch/arm/lib/gic_64.S +++ b/arch/arm/lib/gic_64.S @@ -10,8 +10,8 @@ #include #include #include -#include #include +#include /************************************************************************* @@ -181,14 +181,10 @@ ENDPROC(gic_kick_secondary_cpus) * *************************************************************************/ ENTRY(gic_wait_for_interrupt) -0: wfi #if defined(CONFIG_GICV3) - mrs x9, ICC_IAR1_EL1 - msr ICC_EOIR1_EL1, x9 + gic_wait_for_interrupt_m x9 #elif defined(CONFIG_GICV2) - ldr w9, [x0, GICC_AIAR] - str w9, [x0, GICC_AEOIR] + gic_wait_for_interrupt_m x0, w9 #endif - cbnz w9, 0b ret ENDPROC(gic_wait_for_interrupt) -- cgit