From 77eb9a90ddbfd942352d735f4ab8785e4035309b Mon Sep 17 00:00:00 2001 From: Giulio Benetti Date: Fri, 10 Jan 2020 15:51:47 +0100 Subject: imx: Add basic support for the NXP IMXRT10xx SoC family Add i.IMXRT family basic support. Signed-off-by: Giulio Benetti --- arch/arm/mach-imx/imxrt/soc.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/arm/mach-imx/imxrt/soc.c (limited to 'arch/arm/mach-imx/imxrt/soc.c') diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c new file mode 100644 index 0000000000..e1eea23035 --- /dev/null +++ b/arch/arm/mach-imx/imxrt/soc.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 + * Author(s): Giulio Benetti + */ + +#include +#include +#include + +int arch_cpu_init(void) +{ + int i; + + struct mpu_region_config imxrt1050_region_config[] = { + { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, + STRONG_ORDER, REGION_4GB }, + { PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW, + O_I_WB_RD_WR_ALLOC, (ffs(PHYS_SDRAM_SIZE) - 2) }, + { DMAMEM_BASE, + REGION_2, XN_DIS, PRIV_RW_USR_RW, + STRONG_ORDER, (ffs(DMAMEM_SZ_ALL) - 2) }, + }; + + /* + * Configure the memory protection unit (MPU) to allow full access to + * the whole 4GB address space. + */ + disable_mpu(); + for (i = 0; i < ARRAY_SIZE(imxrt1050_region_config); i++) + mpu_config(&imxrt1050_region_config[i]); + enable_mpu(); + + return 0; +} -- cgit