From 9402cafb2398bbb3ecba356c692ec9cb89b59d60 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 8 Aug 2017 16:21:39 +0800 Subject: imx: mx6sl: simplify code using setbits_le32 Simplify code by removing set_preclk_from_osc with directly setbits_le32. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam --- arch/arm/mach-imx/mx6/soc.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) (limited to 'arch/arm/mach-imx/mx6') diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 48eaa84921..9ede1f5435 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -365,18 +365,6 @@ static void init_bandgap(void) } } -#ifdef CONFIG_MX6SL -static void set_preclk_from_osc(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - u32 reg; - - reg = readl(&mxc_ccm->cscmr1); - reg |= MXC_CCM_CSCMR1_PER_CLK_SEL_MASK; - writel(reg, &mxc_ccm->cscmr1); -} -#endif - int arch_cpu_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; @@ -444,9 +432,8 @@ int arch_cpu_init(void) } /* Set perclk to source from OSC 24MHz */ -#if defined(CONFIG_MX6SL) - set_preclk_from_osc(); -#endif + if (is_mx6sl()) + setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK); imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */ -- cgit