From 7bf82cc1f8ac4c85f6eb1b7e37e302792fa954aa Mon Sep 17 00:00:00 2001 From: Andreas Dannenberg Date: Sat, 16 May 2020 21:05:01 +0530 Subject: arm: mach-k3: j721e_init: Add support for backup boot modes When the boot of J721E devices using the primary bootmode (configured via device pins) fails a boot using the configured backup bootmode is attempted. To take advantage of the backup boot mode feature go ahead and add support to the J721E init code to determine whether the ROM code performed the boot using the primary or backup boot mode, and if booted from the backup boot mode, decode the bootmode settings into the appropriate U-Boot mode accordingly so that the boot can proceed. Signed-off-by: Andreas Dannenberg Signed-off-by: Faiz Abbas --- arch/arm/mach-k3/include/mach/j721e_hardware.h | 2 ++ arch/arm/mach-k3/include/mach/j721e_spl.h | 12 +++++++++ arch/arm/mach-k3/j721e_init.c | 35 ++++++++++++++++++++++++-- 3 files changed, 47 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-k3') diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h index ead136ed63..2efa911a9a 100644 --- a/arch/arm/mach-k3/include/mach/j721e_hardware.h +++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h @@ -18,6 +18,8 @@ #define MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT 1 #define MAIN_DEVSTAT_PRIM_BOOTMODE_MMC_PORT_MASK BIT(6) #define MAIN_DEVSTAT_PRIM_BOOTMODE_PORT_SHIFT 6 +#define MAIN_DEVSTAT_BKUP_MMC_PORT_MASK BIT(7) +#define MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT 7 #define WKUP_CTRL_MMR0_BASE 0x43000000 #define MCU_CTRL_MMR0_BASE 0x40f00000 diff --git a/arch/arm/mach-k3/include/mach/j721e_spl.h b/arch/arm/mach-k3/include/mach/j721e_spl.h index 475278bd04..1cabc01dc4 100644 --- a/arch/arm/mach-k3/include/mach/j721e_spl.h +++ b/arch/arm/mach-k3/include/mach/j721e_spl.h @@ -25,7 +25,19 @@ #define BOOT_DEVICE_MMC2_2 0x16 #define BOOT_DEVICE_RAM 0x17 +/* Backup boot modes with MCU Only = 0 */ +#define BACKUP_BOOT_DEVICE_RAM 0x0 +#define BACKUP_BOOT_DEVICE_USB 0x1 +#define BACKUP_BOOT_DEVICE_UART 0x3 +#define BACKUP_BOOT_DEVICE_ETHERNET 0x4 +#define BACKUP_BOOT_DEVICE_MMC2 0x5 +#define BACKUP_BOOT_DEVICE_SPI 0x6 +#define BACKUP_BOOT_DEVICE_I2C 0x7 + #define BOOT_MODE_B_SHIFT 4 #define BOOT_MODE_B_MASK BIT(4) +#define K3_PRIMARY_BOOTMODE 0x0 +#define K3_BACKUP_BOOTMODE 0x1 + #endif diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 71fc20c30b..18a3c1c052 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -235,6 +235,35 @@ u32 spl_mmc_boot_mode(const u32 boot_device) } } +static u32 __get_backup_bootmedia(u32 main_devstat) +{ + u32 bkup_boot = (main_devstat & MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >> + MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT; + + switch (bkup_boot) { + case BACKUP_BOOT_DEVICE_USB: + return BOOT_DEVICE_DFU; + case BACKUP_BOOT_DEVICE_UART: + return BOOT_DEVICE_UART; + case BACKUP_BOOT_DEVICE_ETHERNET: + return BOOT_DEVICE_ETHERNET; + case BACKUP_BOOT_DEVICE_MMC2: + { + u32 port = (main_devstat & MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >> + MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT; + if (port == 0x0) + return BOOT_DEVICE_MMC1; + return BOOT_DEVICE_MMC2; + } + case BACKUP_BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + case BACKUP_BOOT_DEVICE_I2C: + return BOOT_DEVICE_I2C; + } + + return BOOT_DEVICE_RAM; +} + static u32 __get_primary_bootmedia(u32 main_devstat, u32 wkup_devstat) { @@ -271,8 +300,10 @@ u32 spl_boot_device(void) /* MAIN CTRL MMR can only be read if MCU ONLY is 0 */ main_devstat = readl(CTRLMMR_MAIN_DEVSTAT); - /* ToDo: Add support for backup boot media */ - return __get_primary_bootmedia(main_devstat, wkup_devstat); + if (bootindex == K3_PRIMARY_BOOTMODE) + return __get_primary_bootmedia(main_devstat, wkup_devstat); + else + return __get_backup_bootmedia(main_devstat); } #endif -- cgit From c02712a7484918648e5dd09c092035c7eeb7794a Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Mon, 18 May 2020 07:57:22 +0200 Subject: arm: mach-k3: Enable dcache in SPL Add support for enabling dcache already in SPL. It accelerates the boot and resolves the risk to run into unaligned 64-bit accesses. Based on original patch by Lokesh Vulta. Signed-off-by: Jan Kiszka Acked-by: Lokesh Vutla --- arch/arm/mach-k3/am6_init.c | 1 + arch/arm/mach-k3/common.c | 35 +++++++++++++++++++++++++++++++++++ arch/arm/mach-k3/common.h | 1 + arch/arm/mach-k3/j721e_init.c | 1 + 4 files changed, 38 insertions(+) (limited to 'arch/arm/mach-k3') diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index b692806352..586f5c022e 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -197,6 +197,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif + spl_enable_dcache(); } u32 spl_mmc_boot_mode(const u32 boot_device) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 80dfa5f0fd..a94e054491 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -406,3 +406,38 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size) } } } + +void spl_enable_dcache(void) +{ +#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) + phys_addr_t ram_top = CONFIG_SYS_SDRAM_BASE; + + dram_init_banksize(); + + /* reserve TLB table */ + gd->arch.tlb_size = PGTABLE_SIZE; + + ram_top += get_effective_memsize(); + /* keep ram_top in the 32-bit address space */ + if (ram_top >= 0x100000000) + ram_top = (phys_addr_t) 0x100000000; + + gd->arch.tlb_addr = ram_top - gd->arch.tlb_size; + debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, + gd->arch.tlb_addr + gd->arch.tlb_size); + + dcache_enable(); +#endif +} + +#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) +void spl_board_prepare_for_boot(void) +{ + dcache_disable(); +} + +void spl_board_prepare_for_boot_linux(void) +{ + dcache_disable(); +} +#endif diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 57682e1973..94cdcb56ad 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -27,3 +27,4 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size); void start_non_linux_remote_cores(void); int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr); void k3_sysfw_print_ver(void); +void spl_enable_dcache(void); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 18a3c1c052..031279bc5b 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -221,6 +221,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif + spl_enable_dcache(); } u32 spl_mmc_boot_mode(const u32 boot_device) -- cgit