From f4db6c976cf8f414c555ccbd355de787b2706be3 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 7 Jan 2016 14:12:04 +0100 Subject: arm: mvebu: Add runtime detection of UART (xmodem) boot-mode This patch adds runtime detection of the Marvell UART boot-mode (xmodem protocol). If this boot-mode is detected, SPL will return to the BootROM to continue the UART booting. With this patch its now possible, to generate a U-Boot image that can be booted either from the strapped boot-device (e.g. SPI NOR, MMC, etc) or via the xmodem protocol from the UART. In the UART case, the kwboot tool will dynamically insert the UART boot-device type into the image. And also patch the load address in the header, so that the mkimage header will be skipped (as its not expected by the Marvell BootROM). This simplifies the development for Armada XP / 38x based boards. As no special images need to be generated by selecting the MVEBU_BOOTROM_UARTBOOT Kconfig option. Since the Kconfig option MVEBU_BOOTROM_UARTBOOT is not needed any more, its now completely removed. Signed-off-by: Stefan Roese Cc: Luka Perkov Cc: Dirk Eibach Cc: Phil Sutter Cc: Kevin Smith --- arch/arm/mach-mvebu/include/mach/soc.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mvebu/include/mach') diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index e27a36db1c..c696fc6cec 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -96,6 +96,12 @@ #define MVCPU_WIN_ENABLE CPU_WIN_ENABLE #define MVCPU_WIN_DISABLE CPU_WIN_DISABLE +/* BootROM error register (also includes some status infos) */ +#define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) +#define BOOTROM_ERR_MODE_OFFS 28 +#define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) +#define BOOTROM_ERR_MODE_UART 0x6 + #if defined(CONFIG_ARMADA_38X) /* SAR values for Armada 38x */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600)) @@ -106,7 +112,7 @@ #define SAR_BOOT_DEVICE_MASK (0x1f << SAR_BOOT_DEVICE_OFFS) #define BOOT_DEV_SEL_OFFS 4 -#define BOOT_DEV_SEL_MASK (0x1f << BOOT_DEV_SEL_OFFS) +#define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) #define BOOT_FROM_UART 0x28 #define BOOT_FROM_SPI 0x32 -- cgit