From 30bade20a67a8205e10d006d8e1ac66552c1b137 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Wed, 10 Oct 2018 14:55:23 +0200 Subject: arm: socfpga: fix SPL booting from fpga OnChip RAM This patch prevents disabling the FPGA bridges when SPL or U-Boot is executed from FPGA onchip RAM. Signed-off-by: Simon Goldschmidt --- arch/arm/mach-socfpga/include/mach/misc.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/mach-socfpga/include/mach/misc.h') diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h index 4fc9570a04..26609927c8 100644 --- a/arch/arm/mach-socfpga/include/mach/misc.h +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -6,6 +6,8 @@ #ifndef _MISC_H_ #define _MISC_H_ +#include + void dwmac_deassert_reset(const unsigned int of_reset_id, const u32 phymode); struct bsel { @@ -23,6 +25,13 @@ static inline void socfpga_fpga_add(void) {} #ifdef CONFIG_TARGET_SOCFPGA_GEN5 void socfpga_sdram_remap_zero(void); +static inline bool socfpga_is_booting_from_fpga(void) +{ + if ((__image_copy_start >= (char *)SOCFPGA_FPGA_SLAVES_ADDRESS) && + (__image_copy_start < (char *)SOCFPGA_STM_ADDRESS)) + return true; + return false; +} #endif #ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 -- cgit