From 7ae22d72781de76b3c23b018a3fccc172e9875de Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 12 Feb 2020 19:37:38 +0100 Subject: arm: stm32mp: bsec: add permanent lock support in bsec driver Add BSEC lock access (read / write) at 0xC0000000 offset of misc driver. The write access only available for Trusted boot mode, based on new SMC STM32_SMC_WRLOCK_OTP. With the fuse command, the permanent lock status is accessed with 0x10000000 offset (0xC0000000 - 0x8000000 for OTP sense/program divided by u32 size), for example: Read lock status of fuse 57 (0x39) STM32MP> fuse sense 0 0x10000039 1 Sensing bank 0: Word 0x10000039: 00000000 Set permanent lock of fuse 57 (0x39) STM32MP> fuse prog 0 0x10000039 1 Sensing bank 0: Word 0x10000039: 00000000 WARNING: the OTP lock is updated only after reboot WARING: Programming lock or fuses is an irreversible operation! This may brick your system. Signed-off-by: Patrick Delaunay Acked-by: Patrice Chotard --- arch/arm/mach-stm32mp/include/mach/stm32.h | 9 ++++++++- arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h | 1 + 2 files changed, 9 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-stm32mp/include') diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index f0636005e5..6daf9f7121 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -119,7 +119,14 @@ enum forced_boot_mode { #define STM32_BSEC_SHADOW(id) (STM32_BSEC_SHADOW_OFFSET + (id) * 4) #define STM32_BSEC_OTP_OFFSET 0x80000000 #define STM32_BSEC_OTP(id) (STM32_BSEC_OTP_OFFSET + (id) * 4) - +#define STM32_BSEC_LOCK_OFFSET 0xC0000000 +#define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4) + +/* BSEC OTP index */ +#define BSEC_OTP_RPN 1 +#define BSEC_OTP_SERIAL 13 +#define BSEC_OTP_PKG 16 +#define BSEC_OTP_MAC 57 #define BSEC_OTP_BOARD 59 #endif /* __ASSEMBLY__*/ diff --git a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h index 8130546b27..7b9167c356 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h @@ -27,6 +27,7 @@ #define STM32_SMC_READ_OTP 0x04 #define STM32_SMC_READ_ALL 0x05 #define STM32_SMC_WRITE_ALL 0x06 +#define STM32_SMC_WRLOCK_OTP 0x07 /* SMC error codes */ #define STM32_SMC_OK 0x0 -- cgit From 718f7bf7ca31277fbe5fdf49b6fa897736b7f36d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 12 Feb 2020 19:37:40 +0100 Subject: arm: stm32mp: improve the error message for smc Add the SMC code and operation for trace on errors. Signed-off-by: Patrick Delaunay Acked-by: Patrice Chotard --- arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-stm32mp/include') diff --git a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h index 7b9167c356..4ad14f963b 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h @@ -46,8 +46,8 @@ static inline u32 stm32_smc(u32 svc, u8 op, u32 data1, u32 data2, u32 *result) arm_smccc_smc(svc, op, data1, data2, 0, 0, 0, 0, &res); if (res.a0) { - pr_err("%s: Failed to exec in secure mode (err = %ld)\n", - __func__, res.a0); + pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n", + __func__, svc, op, res.a0); return -EINVAL; } if (result) -- cgit From ac5e4d8af8d3fd89068db1e50cafd646175c66d6 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 12 Feb 2020 19:37:43 +0100 Subject: arm: stm32mp: add function get_soc_name Add a function get_soc_name to get a string with the full name of the SOC "STM32MP15xxx Rev.x" Signed-off-by: Patrick Delaunay Acked-by: Patrice Chotard --- arch/arm/mach-stm32mp/include/mach/sys_proto.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-stm32mp/include') diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index da46c11573..065b7b2856 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -29,6 +29,10 @@ u32 get_cpu_package(void); #define PKG_AC_TFBGA361 2 #define PKG_AD_TFBGA257 1 +/* Get SOC name */ +#define SOC_NAME_SIZE 20 +void get_soc_name(char name[SOC_NAME_SIZE]); + /* return boot mode */ u32 get_bootmode(void); -- cgit From 050fed8a974790f553b580f8e2cdb26181f875c1 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 26 Feb 2020 11:26:43 +0100 Subject: stm32mp1: add 800 MHz profile support The STM32MP1 series is available in 3 different lines which are pin-to-pin compatible: - STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD - STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD - STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz Each line comes with a security option (cryptography & secure boot) & a Cortex-A frequency option : - A : Cortex-A7 @ 650 MHz - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz - D : Cortex-A7 @ 800 MHz - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz This patch adds the support of STM32MP15xD and STM32MP15xF in U-Boot. Signed-off-by: Patrick Delaunay Acked-by: Patrice Chotard --- arch/arm/mach-stm32mp/include/mach/sys_proto.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-stm32mp/include') diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index 065b7b2856..1617126bea 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -3,13 +3,19 @@ * Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved */ -/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0)*/ +/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) */ #define CPU_STM32MP157Cxx 0x05000000 #define CPU_STM32MP157Axx 0x05000001 #define CPU_STM32MP153Cxx 0x05000024 #define CPU_STM32MP153Axx 0x05000025 #define CPU_STM32MP151Cxx 0x0500002E #define CPU_STM32MP151Axx 0x0500002F +#define CPU_STM32MP157Fxx 0x05000080 +#define CPU_STM32MP157Dxx 0x05000081 +#define CPU_STM32MP153Fxx 0x050000A4 +#define CPU_STM32MP153Dxx 0x050000A5 +#define CPU_STM32MP151Fxx 0x050000AE +#define CPU_STM32MP151Dxx 0x050000AF /* return CPU_STMP32MP...Xxx constants */ u32 get_cpu_type(void); -- cgit From e9a20f8a198c11a4108ca4b4deef8398f0cd93aa Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 6 Mar 2020 11:14:03 +0100 Subject: ram: stm32mp1: increase vdd2_ddr: buck2 for 32bits LPDDR Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2 form 1.2V to 1.25V for 32bits configuration. Signed-off-by: Patrick Delaunay Acked-by: Patrice Chotard --- arch/arm/mach-stm32mp/include/mach/ddr.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-stm32mp/include') diff --git a/arch/arm/mach-stm32mp/include/mach/ddr.h b/arch/arm/mach-stm32mp/include/mach/ddr.h index b8a17cfbdd..bfc42a7c48 100644 --- a/arch/arm/mach-stm32mp/include/mach/ddr.h +++ b/arch/arm/mach-stm32mp/include/mach/ddr.h @@ -9,8 +9,10 @@ /* DDR power initializations */ enum ddr_type { STM32MP_DDR3, - STM32MP_LPDDR2, - STM32MP_LPDDR3, + STM32MP_LPDDR2_16, + STM32MP_LPDDR2_32, + STM32MP_LPDDR3_16, + STM32MP_LPDDR3_32, }; int board_ddr_power_init(enum ddr_type ddr_type); -- cgit