From c199489f17c91ee4fed73263d1117d1c1a933c6f Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Sat, 8 Apr 2017 15:30:12 +0800 Subject: sunxi: add basic V3s support Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng Acked-by: Maxime Ripard Reviewed-by: Jagan Teki Signed-off-by: Maxime Ripard --- arch/arm/mach-sunxi/board.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-sunxi/board.c') diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 6ce07dfe0f..4507279cc5 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -114,6 +114,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_A83T_GPB_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPB(10), SUN8I_A83T_GPB_UART0); sunxi_gpio_set_pull(SUNXI_GPB(10), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN8I_V3S) + sunxi_gpio_set_cfgpin(SUNXI_GPB(8), SUN8I_V3S_GPB_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPB(9), SUN8I_V3S_GPB_UART0); + sunxi_gpio_set_pull(SUNXI_GPB(9), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I) sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0); -- cgit