From 67337e68a5a88ecbe4ae0df6a91c653f2817c3e1 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Sat, 3 Jun 2017 17:10:20 +0800 Subject: sunxi: add support for the DDR2 in V3s SoC Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its timing param. Add support for it. Signed-off-by: Icenowy Zheng Acked-by: Jagan Teki Tested-by: Jagan Teki --- arch/arm/mach-sunxi/dram_timings/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-sunxi/dram_timings/Makefile') diff --git a/arch/arm/mach-sunxi/dram_timings/Makefile b/arch/arm/mach-sunxi/dram_timings/Makefile index 7e71c76a5c..a4c9dc556c 100644 --- a/arch/arm/mach-sunxi/dram_timings/Makefile +++ b/arch/arm/mach-sunxi/dram_timings/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_SUNXI_DRAM_DDR3_1333) += ddr3_1333.o +obj-$(CONFIG_SUNXI_DRAM_DDR2_V3S) += ddr2_v3s.o -- cgit