From a8b66ac87cc1d6ffd1b3693514e60edcf61fb678 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 27 Oct 2016 23:47:04 +0900 Subject: ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8 The status register should be polled. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram/umc-ld4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-uniphier/dram/umc-ld4.c') diff --git a/arch/arm/mach-uniphier/dram/umc-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c index 1ea6193f88..82ab63c732 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld4.c +++ b/arch/arm/mach-uniphier/dram/umc-ld4.c @@ -149,7 +149,7 @@ static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base, int ret; writel(UMC_INITSET_INIT1EN, dc_base + UMC_INITSET); - while (readl(dc_base + UMC_INITSET) & UMC_INITSTAT_INIT1ST) + while (readl(dc_base + UMC_INITSTAT) & UMC_INITSTAT_INIT1ST) cpu_relax(); writel(0x00000101, dc_base + UMC_DIOCTLA); -- cgit From 6dd34ae4c4cce6a4b9f62c9be55b343a6f0a35f8 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 27 Oct 2016 23:47:07 +0900 Subject: ARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoC The DDR PHY register view of LD11 is slightly different from that of LD4/Pro4/sLD8, but it will be possible to share the register macros (and I want to re-use as much code as possible). Change the code in the more flexible form. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/dram/umc-ld4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-uniphier/dram/umc-ld4.c') diff --git a/arch/arm/mach-uniphier/dram/umc-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c index 82ab63c732..90e7f2d271 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld4.c +++ b/arch/arm/mach-uniphier/dram/umc-ld4.c @@ -13,7 +13,7 @@ #include #include "../init.h" -#include "ddrphy-regs.h" +#include "ddrphy-init.h" #include "umc-regs.h" #define DRAM_CH_NR 2 -- cgit