From 0c1456d571e77000a98cdf5009fad6277426aa75 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 23 Jun 2019 12:59:31 +0200 Subject: ARM: correct detection of thumb mode When a crash occurs in thumb mode the crash dump is incorrect. This is due to the usage of a non-existing configuration variable CONFIG_ARM_THUMB in the definition of macro thumb_mode(regs). Use CONFIG_IS_ENABLED(SYS_THUMB_BUILD) to detect that the code has been compiled for thumb mode. Remove ARM_THUMB from config_whitelist.txt. With the patch crash dumps indicate thumb mode correctly. On a system with thumb mode: => exception unaligned data abort pc : [<8f7a2b52>] lr : [<8f7ab1ef>] reloc pc : [<1780cb52>] lr : [<178151ef>] sp : 8ed8c3f8 ip : 8f7a2b4d fp : 00000002 r10: 8f7f8228 r9 : 8ed95ea8 r8 : 8ed99488 r7 : 8f7ab141 r6 : 00000000 r5 : 8ed8c3f9 r4 : 8f7f6390 r3 : 8ed9948c r2 : 00000001 r1 : 00000000 r0 : 8f7f6390 Flags: nzCv IRQs off FIQs off Mode SVC_32 (T) Code: 8f7e 466d f105 0501 (e9d5) 6700 The Flags line has '(T)' and in the Code line the output is in u16 groups. On a system without thumb mode: => exception breakpoint prefetch abort pc : [<7ff5a5c8>] lr : [<7ff675ec>] reloc pc : [<0000e5c8>] lr : [<0001b5ec>] sp : 7ee0ad80 ip : 7ff5a5cc fp : 7ff674cc r10: 00000002 r9 : 7ef0bed8 r8 : 7ffd6214 r7 : 7ef0e080 r6 : 00000000 r5 : 7ffd4090 r4 : 00000000 r3 : 7ef0e084 r2 : 00000001 r1 : 00000000 r0 : 7ffd4090 Flags: nzCv IRQs off FIQs off Mode SVC_32 Code: e1a0500d e2855001 e1c560d0 e3a00001 (e12fff1e) The Flags line does not show '(T)' and in the Code line the output is in u32 groups. Reported-by: Marek Vasut Signed-off-by: Heinrich Schuchardt Reviewed-by: Marek Vasut --- arch/arm/include/asm/proc-armv/ptrace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h index 183b00a087..e37ad8fd1f 100644 --- a/arch/arm/include/asm/proc-armv/ptrace.h +++ b/arch/arm/include/asm/proc-armv/ptrace.h @@ -86,7 +86,7 @@ struct pt_regs { #define user_mode(regs) \ (((regs)->ARM_cpsr & 0xf) == 0) -#ifdef CONFIG_ARM_THUMB +#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD) #define thumb_mode(regs) \ (((regs)->ARM_cpsr & T_BIT)) #else -- cgit From 6324d50679b4eae7f611a41a1885ef395ac7b1b9 Mon Sep 17 00:00:00 2001 From: AKASHI Takahiro Date: Wed, 3 Jul 2019 10:44:39 +0900 Subject: arm: move CONFIG_TFABOOT to generic Kconfig Currently, CONFIG_TFABOOT is located in armv8/fsl-layerscape Kconfig, but it will be also useful for other targets if some additional configuration are necessary. So move it to arch/arm/Kconfig. Please note that CONFIG_TFABOOT still depends on CONFIG_ARCH_SUPPORT_TFABOOT and so the menu won't come up if any target doesn't need its own customization for TF-A boot. This will maintain the compatibility. Signed-off-by: AKASHI Takahiro Cc: Rajesh Bhagat Cc: York Sun Cc: Prabhakar Kushwaha Cc: Priyanka Jain Cc: Sriram Dash Cc: Hou Zhiqiang Cc: Peng Ma Cc: Yuantian Tang Cc: Pankit Garg --- arch/arm/Kconfig | 29 +++++++++++++++++++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 7 ------- 2 files changed, 29 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 05606d9722..602d61ee3d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1100,6 +1100,7 @@ config TARGET_LS1088AQDS select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT select SUPPORT_SPL select FSL_DDR_INTERACTIVE if !SD_BOOT @@ -1115,6 +1116,7 @@ config TARGET_LS2080AQDS select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT select SUPPORT_SPL imply SCSI @@ -1133,6 +1135,7 @@ config TARGET_LS2080ARDB select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT select SUPPORT_SPL select FSL_DDR_BIST @@ -1165,6 +1168,7 @@ config TARGET_LX2160ARDB select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT help Support for NXP LX2160ARDB platform. @@ -1178,6 +1182,7 @@ config TARGET_LX2160AQDS select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT help Support for NXP LX2160AQDS platform. @@ -1218,6 +1223,7 @@ config TARGET_LS1012AQDS bool "Support ls1012aqds" select ARCH_LS1012A select ARM64 + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT help Support for Freescale LS1012AQDS platform. @@ -1229,6 +1235,7 @@ config TARGET_LS1012ARDB bool "Support ls1012ardb" select ARCH_LS1012A select ARM64 + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT imply SCSI imply SCSI_AHCI @@ -1242,6 +1249,7 @@ config TARGET_LS1012A2G5RDB bool "Support ls1012a2g5rdb" select ARCH_LS1012A select ARM64 + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT imply SCSI help @@ -1254,6 +1262,7 @@ config TARGET_LS1012AFRWY bool "Support ls1012afrwy" select ARCH_LS1012A select ARM64 + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT imply SCSI imply SCSI_AHCI @@ -1267,6 +1276,7 @@ config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A select ARM64 + select ARCH_SUPPORT_TFABOOT help Support for Freescale LS1012AFRDM platform. The LS1012A Freedom board (FRDM) is a high-performance @@ -1278,6 +1288,7 @@ config TARGET_LS1028AQDS select ARCH_LS1028A select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT help Support for Freescale LS1028AQDS platform The LS1028A Development System (QDS) is a high-performance @@ -1289,6 +1300,7 @@ config TARGET_LS1028ARDB select ARCH_LS1028A select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT help Support for Freescale LS1028ARDB platform The LS1028A Development System (RDB) is a high-performance @@ -1301,6 +1313,7 @@ config TARGET_LS1088ARDB select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_LATE_INIT select SUPPORT_SPL select FSL_DDR_INTERACTIVE if !SD_BOOT @@ -1359,6 +1372,7 @@ config TARGET_LS1043AQDS select ARCH_LS1043A select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL @@ -1373,6 +1387,7 @@ config TARGET_LS1043ARDB select ARCH_LS1043A select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL @@ -1384,6 +1399,7 @@ config TARGET_LS1046AQDS select ARCH_LS1046A select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select DM_SPI_FLASH if DM_SPI @@ -1403,6 +1419,7 @@ config TARGET_LS1046ARDB select ARCH_LS1046A select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select DM_SPI_FLASH if DM_SPI @@ -1422,6 +1439,7 @@ config TARGET_LS1046AFRWY select ARCH_LS1046A select ARM64 select ARMV8_MULTIENTRY + select ARCH_SUPPORT_TFABOOT select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select DM_SPI_FLASH if DM_SPI @@ -1565,6 +1583,17 @@ config ARCH_ASPEED endchoice +config ARCH_SUPPORT_TFABOOT + bool + +config TFABOOT + bool "Support for booting from TF-A" + depends on ARCH_SUPPORT_TFABOOT + default n + help + Enabling this will make a U-Boot binary that is capable of being + booted via TF-A. + config TI_SECURE_DEVICE bool "HS Device Type Support" depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 3f6c983aaf..5c32738fbf 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -623,10 +623,3 @@ config HAS_FSL_XHCI_USB help For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use pins, select it when the pins are assigned to USB. - -config TFABOOT - bool "Support for booting from TFA" - default n - help - Enabling this will make a U-Boot binary that is capable of being - booted via TFA. -- cgit From 70a64a070e79b657dcb4903299ccad0f5fff8267 Mon Sep 17 00:00:00 2001 From: AKASHI Takahiro Date: Wed, 3 Jul 2019 10:44:40 +0900 Subject: arm: qemu: fix failure in flash initialization if booting from TF-A If U-Boot is loaded and started from TF-A (you need to change SYS_TEXT_BASE to 0x60000000), it will hang up at flash initialization. If secure mode is off (default, or -machine virt,secure=off) at qemu, it will provide dtb with two flash memory banks: flash@0 { bank-width = <0x4>; reg = <0x0 0x0 0x0 0x4000000 0x0 0x4000000 0x0 0x4000000>; compatible = "cfi-flash"; }; If secure mode is on, on the other hand, qemu provides dtb with 1 bank: flash@0 { bank-width = <0x4>; reg = <0x0 0x4000000 0x0 0x4000000>; compatible = "cfi-flash"; }; As a result, flash_init()/flash_get_size() will eventually fail. With this patch applied, relevant CONFIG values are modified. Signed-off-by: AKASHI Takahiro Tested-by: Heinrich Schuchardt --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 602d61ee3d..51d4acedac 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -840,6 +840,7 @@ config ARCH_OWL config ARCH_QEMU bool "QEMU Virtual Platform" + select ARCH_SUPPORT_TFABOOT select DM select DM_SERIAL select OF_CONTROL -- cgit From ea804eb340906c7e3434310de3fa647e747d4eeb Mon Sep 17 00:00:00 2001 From: Weijie Gao Date: Wed, 10 Jul 2019 17:35:42 +0800 Subject: arm: mediatek: add missing arch timer configuration for MT7629 This patch sets CNTVOFF of ARM CP15 timer to zero to make sure the virtual counter is fully usable for linux kernel. Cc: Albert Aribaud Signed-off-by: Weijie Gao --- arch/arm/mach-mediatek/mt7629/lowlevel_init.S | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-mediatek/mt7629/lowlevel_init.S b/arch/arm/mach-mediatek/mt7629/lowlevel_init.S index 3375796b79..0a0672cbea 100644 --- a/arch/arm/mach-mediatek/mt7629/lowlevel_init.S +++ b/arch/arm/mach-mediatek/mt7629/lowlevel_init.S @@ -4,6 +4,7 @@ */ #include +#include #define WAIT_CODE_SRAM_BASE 0x0010ff00 @@ -27,6 +28,18 @@ ENTRY(lowlevel_init) movt r0, #0x131 mcr p15, 0, r0, c14, c0, 0 + cps #MON_MODE + mrc p15, 0, r1, c1, c1, 0 @ Get Secure Config + orr r0, r1, #1 + mcr p15, 0, r0, c1, c1, 0 @ Set Non Secure bit + isb + mov r0, #0 + mcrr p15, 4, r0, r0, c14 @ CNTVOFF = 0 + isb + mcr p15, 0, r1, c1, c1, 0 @ Set Secure bit + isb + cps #SVC_MODE + /* enable SMP bit */ mrc p15, 0, r0, c1, c0, 1 orr r0, r0, #0x40 -- cgit From 58067b0de1e5d8a07ccb8c3a5497beaa0e043c6b Mon Sep 17 00:00:00 2001 From: Weijie Gao Date: Thu, 11 Jul 2019 14:26:24 +0800 Subject: arm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsi The timer0 node has its two clocks written in reversed order. The timer0 is used as the tick timer which causes a problem that the time a delay function used is 4 times longer. This patch reverses these two clocks to solve this issue. Signed-off-by: Weijie Gao --- arch/arm/dts/mt7629.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi index c87115e0fe..ecbd29d7ae 100644 --- a/arch/arm/dts/mt7629.dtsi +++ b/arch/arm/dts/mt7629.dtsi @@ -82,8 +82,8 @@ compatible = "mediatek,timer"; reg = <0x10004000 0x80>; interrupts = ; - clocks = <&topckgen CLK_TOP_10M_SEL>, - <&topckgen CLK_TOP_CLKXTAL_D4>; + clocks = <&topckgen CLK_TOP_CLKXTAL_D4>, + <&topckgen CLK_TOP_10M_SEL>; clock-names = "mux", "src"; u-boot,dm-pre-reloc; }; -- cgit From 5490d6ad3b9f38aa26df36c37a1ffccad77bff7d Mon Sep 17 00:00:00 2001 From: Weijie Gao Date: Thu, 11 Jul 2019 14:26:26 +0800 Subject: arm: dts: MediaTek: remove tick-timer from mt7629.dtsi This patch removes tick-timer as all mt7629 boards should use arch timer. Signed-off-by: Weijie Gao --- arch/arm/dts/mt7629-rfb.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts index 4612218a1e..08c3b59222 100644 --- a/arch/arm/dts/mt7629-rfb.dts +++ b/arch/arm/dts/mt7629-rfb.dts @@ -18,7 +18,6 @@ chosen { stdout-path = &uart0; - tick-timer = &timer0; }; }; -- cgit