From 1960b0103420a74ae5b154ed8684785036e2235b Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 15 May 2017 20:52:16 +0800 Subject: rockchip: clock: rk3036: some fix according TRM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - hclk/pclk_div range　should use '<=' instead of '<' - use GPLL for pd_bus clock source - pd_bus HCLK/PCLK clock rate should not bigger than ACLK Signed-off-by: Kever Yang Reviewed-by: Simon Glass --- arch/arm/include/asm/arch-rockchip/cru_rk3036.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h index eb5eb40027..22278e11ac 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h @@ -16,9 +16,9 @@ #define CORE_PERI_HZ 150000000 #define CORE_ACLK_HZ 300000000 -#define CPU_ACLK_HZ 150000000 -#define CPU_HCLK_HZ 300000000 -#define CPU_PCLK_HZ 300000000 +#define BUS_ACLK_HZ 148500000 +#define BUS_HCLK_HZ 148500000 +#define BUS_PCLK_HZ 74250000 #define PERI_ACLK_HZ 148500000 #define PERI_HCLK_HZ 148500000 -- cgit