From 4244f2b7e86f8e81833ad18c4c80035073098120 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 8 Jan 2019 21:47:26 +0530 Subject: arm64: versal: Add new Kconfig SYS_MEM_RSVD_FOR_MMU This patch adds new config option which is used for reserving a specific memory for MMU Table and in this case we are using TCM for that purpose. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/mach-versal/Kconfig | 7 ++ arch/arm/mach-versal/Makefile | 1 + arch/arm/mach-versal/cpu.c | 15 ++++ arch/arm/mach-versal/include/mach/hardware.h | 23 +++++- arch/arm/mach-versal/include/mach/sys_proto.h | 7 +- arch/arm/mach-versal/mp.c | 111 ++++++++++++++++++++++++++ 6 files changed, 161 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-versal/mp.c (limited to 'arch/arm') diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig index 9cee97b748..f291800bc9 100644 --- a/arch/arm/mach-versal/Kconfig +++ b/arch/arm/mach-versal/Kconfig @@ -41,4 +41,11 @@ config VERSAL_OF_BOARD_DTB_ADDR default 0x1000 depends on OF_BOARD +config SYS_MEM_RSVD_FOR_MMU + bool "Reserve memory for MMU Table" + help + If defined this option is used to setup different space for + MMU table than the one which will be allocated during + relocation. + endif diff --git a/arch/arm/mach-versal/Makefile b/arch/arm/mach-versal/Makefile index c230239320..ca12e29170 100644 --- a/arch/arm/mach-versal/Makefile +++ b/arch/arm/mach-versal/Makefile @@ -6,3 +6,4 @@ obj-y += clk.o obj-y += cpu.o +obj-$(CONFIG_SYS_MEM_RSVD_FOR_MMU) += mp.o diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c index 1fd3c246c1..70c1908ec4 100644 --- a/arch/arm/mach-versal/cpu.c +++ b/arch/arm/mach-versal/cpu.c @@ -7,6 +7,10 @@ #include #include #include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; static struct mm_region versal_mem_map[] = { { @@ -68,6 +72,17 @@ u64 get_page_table_size(void) return 0x14000; } +#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU) +int reserve_mmu(void) +{ + tcm_init(TCM_LOCK); + gd->arch.tlb_size = PGTABLE_SIZE; + gd->arch.tlb_addr = VERSAL_TCM_BASE_ADDR; + + return 0; +} +#endif + #if defined(CONFIG_OF_BOARD) void *board_fdt_blob_setup(void) { diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index aad742625b..23fbc3d8f5 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -11,11 +11,15 @@ #define IOU_SWITCH_CTRL_DIVISOR0_SHIFT 8 struct crlapb_regs { - u32 reserved0[69]; + u32 reserved0[67]; + u32 cpu_r5_ctrl; + u32 reserved; u32 iou_switch_ctrl; /* 0x114 */ u32 reserved1[13]; u32 timestamp_ref_ctrl; /* 0x14c */ - u32 reserved2[126]; + u32 reserved3[108]; + u32 rst_cpu_r5; + u32 reserved2[17]; u32 rst_timestamp; /* 0x348 */ }; @@ -32,3 +36,18 @@ struct iou_scntrs_regs { }; #define iou_scntr_secure ((struct iou_scntrs_regs *)VERSAL_IOU_SCNTR_SECURE) + +#define VERSAL_TCM_BASE_ADDR 0xFFE00000 +#define VERSAL_TCM_SIZE 0x40000 + +#define VERSAL_RPU_BASEADDR 0xFF9A0000 + +struct rpu_regs { + u32 rpu_glbl_ctrl; + u32 reserved0[63]; + u32 rpu0_cfg; /* 0x100 */ + u32 reserved1[63]; + u32 rpu1_cfg; /* 0x200 */ +}; + +#define rpu_base ((struct rpu_regs *)VERSAL_RPU_BASEADDR) diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h index 677facba5e..1dc7bf6656 100644 --- a/arch/arm/mach-versal/include/mach/sys_proto.h +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -3,4 +3,9 @@ * Copyright 2016 - 2018 Xilinx, Inc. */ -/* Empty file - for compilation */ +enum { + TCM_LOCK, + TCM_SPLIT, +}; + +void tcm_init(u8 mode); diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c new file mode 100644 index 0000000000..4b434b0ac3 --- /dev/null +++ b/arch/arm/mach-versal/mp.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2019 Xilinx, Inc. + * Siva Durga Prasad + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define HALT 0 +#define RELEASE 1 + +#define VERSAL_RPU_CFG_CPU_HALT_MASK 0x01 +#define VERSAL_RPU_GLBL_CTRL_SPLIT_LOCK_MASK 0x08 +#define VERSAL_RPU_GLBL_CTRL_TCM_COMB_MASK 0x40 +#define VERSAL_RPU_GLBL_CTRL_SLCLAMP_MASK 0x10 + +#define VERSAL_CRLAPB_RST_LPD_AMBA_RST_MASK 0x04 +#define VERSAL_CRLAPB_RST_LPD_R50_RST_MASK 0x01 +#define VERSAL_CRLAPB_RST_LPD_R51_RST_MASK 0x02 +#define VERSAL_CRL_RST_CPU_R5_RESET_PGE_MASK 0x10 +#define VERSAL_CRLAPB_CPU_R5_CTRL_CLKACT_MASK 0x1000000 + +void set_r5_halt_mode(u8 halt, u8 mode) +{ + u32 tmp; + + tmp = readl(&rpu_base->rpu0_cfg); + if (halt == HALT) + tmp &= ~VERSAL_RPU_CFG_CPU_HALT_MASK; + else + tmp |= VERSAL_RPU_CFG_CPU_HALT_MASK; + writel(tmp, &rpu_base->rpu0_cfg); + + if (mode == TCM_LOCK) { + tmp = readl(&rpu_base->rpu1_cfg); + if (halt == HALT) + tmp &= ~VERSAL_RPU_CFG_CPU_HALT_MASK; + else + tmp |= VERSAL_RPU_CFG_CPU_HALT_MASK; + writel(tmp, &rpu_base->rpu1_cfg); + } +} + +void set_r5_tcm_mode(u8 mode) +{ + u32 tmp; + + tmp = readl(&rpu_base->rpu_glbl_ctrl); + if (mode == TCM_LOCK) { + tmp &= ~VERSAL_RPU_GLBL_CTRL_SPLIT_LOCK_MASK; + tmp |= VERSAL_RPU_GLBL_CTRL_TCM_COMB_MASK | + VERSAL_RPU_GLBL_CTRL_SLCLAMP_MASK; + } else { + tmp |= VERSAL_RPU_GLBL_CTRL_SPLIT_LOCK_MASK; + tmp &= ~(VERSAL_RPU_GLBL_CTRL_TCM_COMB_MASK | + VERSAL_RPU_GLBL_CTRL_SLCLAMP_MASK); + } + + writel(tmp, &rpu_base->rpu_glbl_ctrl); +} + +void release_r5_reset(u8 mode) +{ + u32 tmp; + + tmp = readl(&crlapb_base->rst_cpu_r5); + tmp &= ~(VERSAL_CRLAPB_RST_LPD_AMBA_RST_MASK | + VERSAL_CRLAPB_RST_LPD_R50_RST_MASK | + VERSAL_CRL_RST_CPU_R5_RESET_PGE_MASK); + + if (mode == TCM_LOCK) + tmp &= ~VERSAL_CRLAPB_RST_LPD_R51_RST_MASK; + + writel(tmp, &crlapb_base->rst_cpu_r5); +} + +void enable_clock_r5(void) +{ + u32 tmp; + + tmp = readl(&crlapb_base->cpu_r5_ctrl); + tmp |= VERSAL_CRLAPB_CPU_R5_CTRL_CLKACT_MASK; + writel(tmp, &crlapb_base->cpu_r5_ctrl); +} + +void initialize_tcm(bool mode) +{ + if (!mode) { + set_r5_tcm_mode(TCM_LOCK); + set_r5_halt_mode(HALT, TCM_LOCK); + enable_clock_r5(); + release_r5_reset(TCM_LOCK); + } else { + set_r5_tcm_mode(TCM_SPLIT); + set_r5_halt_mode(HALT, TCM_SPLIT); + enable_clock_r5(); + release_r5_reset(TCM_SPLIT); + } +} + +void tcm_init(u8 mode) +{ + puts("WARNING: Initializing TCM overwrites TCM content\n"); + initialize_tcm(mode); + memset((void *)VERSAL_TCM_BASE_ADDR, 0, VERSAL_TCM_SIZE); +} -- cgit From 0fbd2a822506a70da3b9ffb7216ea8d9ec776428 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 8 Jan 2019 21:47:29 +0530 Subject: arm64: versal: Add mini eMMC configuration This patch adds mini eMMC configuration which has only emmc0 and emmc1 functionalities and can run from small amount of memory. This is required for memory constraint devices. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 3 ++ arch/arm/dts/versal-mini-emmc0.dts | 64 ++++++++++++++++++++++++++++++++++++++ arch/arm/dts/versal-mini-emmc1.dts | 64 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 131 insertions(+) create mode 100644 arch/arm/dts/versal-mini-emmc0.dts create mode 100644 arch/arm/dts/versal-mini-emmc1.dts (limited to 'arch/arm') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ca50623480..c61c0c6200 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -186,6 +186,9 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zc1751-xm017-dc3.dtb \ zynqmp-zc1751-xm018-dc4.dtb \ zynqmp-zc1751-xm019-dc5.dtb +dtb-$(CONFIG_ARCH_VERSAL) += \ + versal-mini-emmc0.dtb \ + versal-mini-emmc1.dtb dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \ zynqmp-r5.dtb dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \ diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts new file mode 100644 index 0000000000..7f57d232b7 --- /dev/null +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal Mini eMMC0 Configuration + * + * (C) Copyright 2018-2019, Xilinx, Inc. + * + * Siva Durga Prasad + * Michal Simek + */ + +/dts-v1/; + +/ { + compatible = "xlnx,versal"; + #address-cells = <2>; + #size-cells = <2>; + model = "Xilinx Versal MINI eMMC0"; + + clk25: clk25 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <25000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "okay"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + + sdhci0: sdhci@f1040000 { + compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; + status = "okay"; + reg = <0x0 0xf1040000 0x0 0x10000>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&clk25 &clk25>; + xlnx,device_id = <0>; + no-1-8-v; + xlnx,mio_bank = <0>; + #stream-id-cells = <1>; + }; + }; + + aliases { + serial0 = &dcc; + mmc0 = &sdhci0; + }; + + chosen { + stdout-path = "serial0:115200"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; +}; diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts new file mode 100644 index 0000000000..9ecb1ce5dc --- /dev/null +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal Mini eMMC1 Configuration + * + * (C) Copyright 2018-2019, Xilinx, Inc. + * + * Siva Durga Prasad + * Michal Simek + */ + +/dts-v1/; + +/ { + compatible = "xlnx,versal"; + #address-cells = <2>; + #size-cells = <2>; + model = "Xilinx Versal MINI eMMC1"; + + clk25: clk25 { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <25000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "okay"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + u-boot,dm-pre-reloc; + compatible = "simple-bus"; + #address-cells = <0x2>; + #size-cells = <0x2>; + ranges; + + sdhci1: sdhci@f105000 { + compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a"; + status = "okay"; + reg = <0x0 0xf1050000 0x0 0x10000>; + clock-names = "clk_xin", "clk_ahb"; + clocks = <&clk25 &clk25>; + xlnx,device_id = <1>; + no-1-8-v; + xlnx,mio_bank = <0>; + #stream-id-cells = <1>; + }; + }; + + aliases { + serial0 = &dcc; + mmc0 = &sdhci1; + }; + + chosen { + stdout-path = "serial0:115200"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; +}; -- cgit From 47a766f95015e17f32f2467984a1e018964bcffc Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 28 Jan 2019 11:12:41 +0100 Subject: arm64: versal: Move IOU_SWITCH_DIVISOR0 to Kconfig Move hardcoded IOU_SWITCH_DIVISOR0 to Kconfig to be able to set it up for different platforms. Signed-off-by: Michal Simek --- arch/arm/mach-versal/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig index f291800bc9..26d1756371 100644 --- a/arch/arm/mach-versal/Kconfig +++ b/arch/arm/mach-versal/Kconfig @@ -41,6 +41,12 @@ config VERSAL_OF_BOARD_DTB_ADDR default 0x1000 depends on OF_BOARD +config IOU_SWITCH_DIVISOR0 + hex "IOU switch divisor0" + default 0x20 + help + Setup time clock divisor for input clock. + config SYS_MEM_RSVD_FOR_MMU bool "Reserve memory for MMU Table" help -- cgit From eebbfd865b27f5f20122d9d57f56aa03f6976c90 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Mon, 4 Feb 2019 16:18:29 +0530 Subject: arm64: versal: Add mini configuration for Versal This patch adds new mini target for versal. This configuration is very minimal in size which runs from OCM. It contains support for mtest which can be used for running DDR memory tests. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 1 + arch/arm/dts/versal-mini.dts | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 arch/arm/dts/versal-mini.dts (limited to 'arch/arm') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c61c0c6200..2bbe47d8a2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -187,6 +187,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zc1751-xm018-dc4.dtb \ zynqmp-zc1751-xm019-dc5.dtb dtb-$(CONFIG_ARCH_VERSAL) += \ + versal-mini.dtb \ versal-mini-emmc0.dtb \ versal-mini-emmc1.dtb dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \ diff --git a/arch/arm/dts/versal-mini.dts b/arch/arm/dts/versal-mini.dts new file mode 100644 index 0000000000..6a83981cc2 --- /dev/null +++ b/arch/arm/dts/versal-mini.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal Mini Configuration + * + * (C) Copyright 2019, Xilinx, Inc. + * + * Siva Durga Prasad Paladugu + */ + +/dts-v1/; + +/ { + model = "Versal MINI"; + compatible = "xlnx,versal"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &dcc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "okay"; + u-boot,dm-pre-reloc; + }; +}; -- cgit From aeac8921ab8c925a9ebd87bb59bba92fe03bdd03 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 22 Jan 2019 14:12:54 +0100 Subject: ARM: zynq: Convert Syzygy to DM_I2C Boards have only one controller enabled that's why move to DM_I2C is easy. Add also i2c alias for not to be shown as i2c bus -1 because alias doesn't exist. Config file points to MAC stored in eeprom but it is not listed that's why I have added 24c08 part. Signed-off-by: Michal Simek Reviewed-by: Heiko Schocher --- arch/arm/dts/zynq-syzygy-hub.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-hub.dts index a30d667146..55f8e8a2da 100644 --- a/arch/arm/dts/zynq-syzygy-hub.dts +++ b/arch/arm/dts/zynq-syzygy-hub.dts @@ -16,6 +16,7 @@ ethernet0 = &gem0; serial0 = &uart0; mmc0 = &sdhci0; + i2c0 = &i2c1; }; memory@0 { @@ -26,6 +27,7 @@ chosen { bootargs = ""; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; usb_phy0: phy0 { @@ -52,6 +54,10 @@ &i2c1 { status = "okay"; + eeprom: eeprom@57 { + compatible = "atmel,24c08"; /* not sure if this is correct */ + reg = <0x57>; + }; }; &sdhci0 { -- cgit From e0bc7574fa91786cd296fb778f29c997b9c8f6fd Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 22 Jan 2019 12:48:47 +0100 Subject: ARM: zynq: Remove addresses for i2c controllers All platforms have been converted to DM that's why there is no reason to keep addresses in headers. They are all read from DT now. Signed-off-by: Michal Simek Reviewed-by: Heiko Schocher --- arch/arm/mach-zynq/include/mach/hardware.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h index 58b6f95395..5412ed6827 100644 --- a/arch/arm/mach-zynq/include/mach/hardware.h +++ b/arch/arm/mach-zynq/include/mach/hardware.h @@ -9,8 +9,6 @@ #define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000 #define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000 #define ZYNQ_SCU_BASEADDR 0xF8F00000 -#define ZYNQ_I2C_BASEADDR0 0xE0004000 -#define ZYNQ_I2C_BASEADDR1 0xE0005000 #define ZYNQ_QSPI_BASEADDR 0xE000D000 #define ZYNQ_SMC_BASEADDR 0xE000E000 #define ZYNQ_NAND_BASEADDR 0xE1000000 -- cgit From 8bdad43333cb71d65929a9f7d19f323c76364b67 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 18 Jan 2019 09:10:39 +0100 Subject: arm64: zynqmp: Switch all platforms to DM_I2C CONFIG_PCA953X is not needed because of PCA953X is integrated in gpio subsystem already. That's why also remove CMD_PCA953X which is only for this driver. zcu102/zcu104-revC/zcu106/zcu111 contain links to eeprom which stores MAC address. DM_I2C is not enabled for the whole SoC because it increase size for mini configurations and there is no I2C symbol present to setup dependencies. Signed-off-by: Michal Simek Reviewed-by: Heiko Schocher --- arch/arm/dts/zynqmp-zcu102-revA.dts | 1 + arch/arm/dts/zynqmp-zcu104-revC.dts | 1 + arch/arm/dts/zynqmp-zcu106-revA.dts | 1 + arch/arm/dts/zynqmp-zcu111-revA.dts | 1 + 4 files changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 05be919f6f..1b28d331ff 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -36,6 +36,7 @@ chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; memory@0 { diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index becc6a0fe1..623d2c96cd 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -34,6 +34,7 @@ chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; memory@0 { diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 7735e9d2c8..3d5c99ad62 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -36,6 +36,7 @@ chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; memory@0 { diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 172e6cc2ca..f7d6fe0073 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -35,6 +35,7 @@ chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; memory@0 { -- cgit From 6a9a7b81c6a170e8496a0fb7c3e9cda5ce65e842 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 18 Jan 2019 09:09:40 +0100 Subject: arm64: zynqmp: Remove addresses for i2c controllers All platforms have been converted to DM that's why there is no reason to keep addresses in headers. They are all read from DT now. Signed-off-by: Michal Simek Reviewed-by: Heiko Schocher --- arch/arm/mach-zynqmp/include/mach/hardware.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index efb4bba4b8..a0d776166d 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -7,9 +7,6 @@ #ifndef _ASM_ARCH_HARDWARE_H #define _ASM_ARCH_HARDWARE_H -#define ZYNQ_I2C_BASEADDR0 0xFF020000 -#define ZYNQ_I2C_BASEADDR1 0xFF030000 - #define ARASAN_NAND_BASEADDR 0xFF100000 #define ZYNQMP_TCM_BASE_ADDR 0xFFE00000 -- cgit From 35e2b92344b1feee818a8e778b403c8a6a136230 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 13 Feb 2019 13:46:41 +0100 Subject: arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI Replace SDHCI controller listing by Kconfig symbol to let SPL know that this board is using multiple SDHCIs controllers. Kconfig help message should explain why this is needed. Origin symbols were used in full u-boot but with moving to distro boot this was fixed already. Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/Kconfig | 11 +++++++++++ arch/arm/mach-zynqmp/spl.c | 2 +- 2 files changed, 12 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index e9f7e7e489..9bb5a5c202 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -99,6 +99,17 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED config ZYNQ_SDHCI_MAX_FREQ default 200000000 +config SPL_ZYNQMP_TWO_SDHCI + bool "Enable booting from both SDHCIs" + depends on SPL + help + This option reflects that board has two SDHCI controllers which + platform can use as boot device. This option ensures that SPL will + setup BOOT_DEVICE_MMC2 for SDHCI1 controller and BOOT_DEVICE_MMC1 for + SDHCI0 controller. Platforms which have only one SDHCI controller + shouldn't enable this option because it for software SDHCI0 or SDHCI1 + are both covered by BOOT_DEVICE_MMC1. + config SPL_ZYNQMP_ALT_BOOTMODE hex default 0x0 if JTAG_MODE diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index fb3955c93f..f6f5414201 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -85,7 +85,7 @@ u32 spl_boot_device(void) case SD_MODE1: case SD1_LSHFT_MODE: /* not working on silicon v1 */ /* if both controllers enabled, then these two are the second controller */ -#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1) +#if defined(SPL_ZYNQMP_TWO_SDHCI) return BOOT_DEVICE_MMC2; /* else, fall through, the one SDHCI controller that is enabled is number 1 */ #endif -- cgit From 7b85f7901d4a761d4773c2cb44983f8f7871a69d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 26 Sep 2018 13:36:16 +0200 Subject: ARM: dts: Use mmc@ instead sdhci@ mmc name is recommended based on devicetree specification. Signed-off-by: Michal Simek --- arch/arm/dts/zynq-7000.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 286059d56e..e1b0816a34 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -235,7 +235,7 @@ #size-cells = <0>; }; - sdhci0: sdhci@e0100000 { + sdhci0: mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -245,7 +245,7 @@ reg = <0xe0100000 0x1000>; }; - sdhci1: sdhci@e0101000 { + sdhci1: mmc@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; -- cgit From cd6160b9c1bca99df3463ee602a0133f98119be5 Mon Sep 17 00:00:00 2001 From: Luis Araneda Date: Thu, 12 Jul 2018 00:10:19 -0400 Subject: ARM: dts: zynq: Set correct manufacturer for ZedBoard and MicroZed boards Both boards are made by Avnet, Inc. So add an additional value to the compatible property Signed-off-by: Luis Araneda Signed-off-by: Michal Simek --- arch/arm/dts/zynq-microzed.dts | 2 +- arch/arm/dts/zynq-zed.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts index 79f878eab2..0766398605 100644 --- a/arch/arm/dts/zynq-microzed.dts +++ b/arch/arm/dts/zynq-microzed.dts @@ -9,7 +9,7 @@ / { model = "Zynq MicroZED Board"; - compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000"; + compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000"; aliases { serial0 = &uart1; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts index 9c505fb7b8..c54515d536 100644 --- a/arch/arm/dts/zynq-zed.dts +++ b/arch/arm/dts/zynq-zed.dts @@ -8,7 +8,7 @@ / { model = "Zynq Zed Development Board"; - compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; + compatible = "avnet,zynq-zed", "xlnx,zynq-zed", "xlnx,zynq-7000"; aliases { ethernet0 = &gem0; -- cgit From 9896dc65580ffd9af74659a50157d1741bff016c Mon Sep 17 00:00:00 2001 From: Luis Araneda Date: Thu, 12 Jul 2018 00:10:20 -0400 Subject: ARM: dts: zynq: correct and improve the model property of dt files Replace the current value of the model property by a more accurate description of each board (which includes the manufacturer), as some of the boards had the same value ("Xilinx Zynq") Signed-off-by: Luis Araneda Signed-off-by: Michal Simek --- arch/arm/dts/zynq-cc108.dts | 2 +- arch/arm/dts/zynq-zc702.dts | 2 +- arch/arm/dts/zynq-zc706.dts | 2 +- arch/arm/dts/zynq-zc770-xm010.dts | 2 +- arch/arm/dts/zynq-zc770-xm011.dts | 2 +- arch/arm/dts/zynq-zc770-xm012.dts | 2 +- arch/arm/dts/zynq-zc770-xm013.dts | 2 +- arch/arm/dts/zynq-zed.dts | 2 +- arch/arm/dts/zynq-zybo.dts | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts index 5f8a0d2555..64d73ecbc5 100644 --- a/arch/arm/dts/zynq-cc108.dts +++ b/arch/arm/dts/zynq-cc108.dts @@ -12,8 +12,8 @@ /include/ "zynq-7000.dtsi" / { + model = "Xilinx CC108 board"; compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000"; - model = "Xilinx Zynq"; aliases { ethernet0 = &gem0; diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 12e35618f8..54231cd580 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -7,7 +7,7 @@ #include "zynq-7000.dtsi" / { - model = "Zynq ZC702 Development Board"; + model = "Xilinx ZC702 board"; compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; aliases { diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts index f24364b385..84729e9feb 100644 --- a/arch/arm/dts/zynq-zc706.dts +++ b/arch/arm/dts/zynq-zc706.dts @@ -7,7 +7,7 @@ #include "zynq-7000.dtsi" / { - model = "Zynq ZC706 Development Board"; + model = "Xilinx ZC706 board"; compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; aliases { diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index a779672f3a..b7c7649d5d 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -8,8 +8,8 @@ #include "zynq-7000.dtsi" / { + model = "Xilinx ZC770 XM010 board"; compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; - model = "Xilinx Zynq"; aliases { ethernet0 = &gem0; diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts index 3fe6eb559e..1123bfc743 100644 --- a/arch/arm/dts/zynq-zc770-xm011.dts +++ b/arch/arm/dts/zynq-zc770-xm011.dts @@ -8,8 +8,8 @@ #include "zynq-7000.dtsi" / { + model = "Xilinx ZC770 XM011 board"; compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000"; - model = "Xilinx Zynq"; aliases { i2c0 = &i2c1; diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts index 19d5b275ae..0d001c9161 100644 --- a/arch/arm/dts/zynq-zc770-xm012.dts +++ b/arch/arm/dts/zynq-zc770-xm012.dts @@ -8,8 +8,8 @@ #include "zynq-7000.dtsi" / { + model = "Xilinx ZC770 XM012 board"; compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; - model = "Xilinx Zynq"; aliases { i2c0 = &i2c0; diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index efd0833eab..05a49982cc 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -8,8 +8,8 @@ #include "zynq-7000.dtsi" / { + model = "Xilinx ZC770 XM013 board"; compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; - model = "Xilinx Zynq"; aliases { ethernet0 = &gem1; diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts index c54515d536..d2b7fc2c99 100644 --- a/arch/arm/dts/zynq-zed.dts +++ b/arch/arm/dts/zynq-zed.dts @@ -7,7 +7,7 @@ #include "zynq-7000.dtsi" / { - model = "Zynq Zed Development Board"; + model = "Avnet ZedBoard board"; compatible = "avnet,zynq-zed", "xlnx,zynq-zed", "xlnx,zynq-7000"; aliases { diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts index 3844822305..0ac54ebbdc 100644 --- a/arch/arm/dts/zynq-zybo.dts +++ b/arch/arm/dts/zynq-zybo.dts @@ -7,7 +7,7 @@ #include "zynq-7000.dtsi" / { - model = "Zynq ZYBO Development Board"; + model = "Digilent Zybo board"; compatible = "digilent,zynq-zybo", "xlnx,zynq-7000"; aliases { -- cgit From 3c8ee337eb786f62d17b334a18427787f8b226bb Mon Sep 17 00:00:00 2001 From: Mounika Grace Akula Date: Tue, 9 Oct 2018 20:52:50 +0530 Subject: arm64: zynqmp: Add reset-on-timeout for all boards and modify default timeout value This patch adds reset-on-timeout to FPD WDT which will trigger an interrupt to PMU when watchdog expiry happens and PMU takes the necessary action. If this property is not enabled, reason will not be known when watchdog expiry happens. This patch also modifies the default timeout to 60 seconds. Reason is that if u-boot enables WDT, it will set the timeout to 10 seconds and this is not enough to boot till Linux and start the WDT application in Linux. 60 seconds is the maximum safest value to boot till Linux and start the WDT application. Users need to change this timeout value to fit their needs. Signed-off-by: Mounika Grace Akula Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu100-revC.dts | 1 - arch/arm/dts/zynqmp.dtsi | 3 ++- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 05491e9bbc..0d9ad86029 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -332,7 +332,6 @@ &watchdog0 { status = "okay"; - reset-on-timeout; }; &xilinx_ams { diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 831d6e1ecc..b28e75732f 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -884,7 +884,8 @@ interrupt-parent = <&gic>; interrupts = <0 113 1>; reg = <0x0 0xfd4d0000 0x0 0x1000>; - timeout-sec = <10>; + timeout-sec = <60>; + reset-on-timeout; }; xilinx_ams: ams@ffa50000 { -- cgit From 91af22bc6b1bddaae441ae82462d280e2be8c6c7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 13 Feb 2019 16:39:51 +0100 Subject: xilinx: dts: Remove additional empty lines Trivial fix. Signed-off-by: Michal Simek --- arch/arm/dts/zynq-zc770-xm010.dts | 1 - arch/arm/dts/zynqmp-zcu100-revC.dts | 1 - arch/arm/dts/zynqmp-zcu102-revA.dts | 1 - 3 files changed, 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index b7c7649d5d..e1f34653ec 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -58,7 +58,6 @@ compatible = "atmel,24c02"; reg = <0x52>; }; - }; &qspi { diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 0d9ad86029..5285f62d1a 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -296,7 +296,6 @@ compatible = "ti,wl1831-st"; enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; }; - }; &uart1 { diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 1b28d331ff..ba099712aa 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -361,7 +361,6 @@ status = "disabled"; /* unreachable */ reg = <0x20>; }; - max20751@72 { /* u95 */ compatible = "maxim,max20751"; reg = <0x72>; -- cgit From 9a06ed88f4275559a9f3a60be501e20b62fce7c1 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Thu, 23 Aug 2018 14:23:29 +0530 Subject: arm64: dts: Fix various entry-method properties to reflect documentation The idle-states binding documentation[1] mentions that the 'entry-method' property is required on 64-bit platforms and must be set to "psci". Linux commit a13f18f59d26 ("Documentation: arm: Fix typo in the idle-states bindings examples") attempted to fix this earlier but clearly more is needed. Linux docs: Documentation/devicetree/bindings/arm/idle-states.txt (see idle-states node) Signed-off-by: Amit Kucheria Acked-by: Sudeep Holla Acked-by: Li Yang Signed-off-by: Olof Johansson Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index b28e75732f..dfb6ebc64c 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -58,7 +58,7 @@ }; idle-states { - entry-method = "arm,psci"; + entry-method = "psci"; CPU_SLEEP_0: cpu-sleep-0 { compatible = "arm,idle-state"; -- cgit From 1317a5e5eae958f6fc9b2472d2307c87fe6931fa Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 13 Feb 2019 15:39:04 +0100 Subject: arm64: zynqmp: Remove autodetected devices without description It will never reach mainline that's why remove it. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu106-revA.dts | 20 -------------------- arch/arm/dts/zynqmp-zcu111-revA.dts | 20 -------------------- 2 files changed, 40 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 3d5c99ad62..00f6e30ef3 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -463,26 +463,6 @@ #size-cells = <0>; reg = <3>; /* DDR4 SODIMM */ - dev@19 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x19>; - }; - dev@30 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x30>; - }; - dev@35 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x35>; - }; - dev@36 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x36>; - }; - dev@51 { /* u-boot detection - maybe SPD */ - compatible = "xxx"; - reg = <0x51>; - }; }; i2c@4 { #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index f7d6fe0073..58021be9bf 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -400,26 +400,6 @@ #size-cells = <0>; reg = <3>; /* DDR4 SODIMM */ - dev@19 { /* u-boot detection FIXME */ - compatible = "xxx"; - reg = <0x19>; - }; - dev@30 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x30>; - }; - dev@35 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x35>; - }; - dev@36 { /* u-boot detection */ - compatible = "xxx"; - reg = <0x36>; - }; - dev@51 { /* u-boot detection - maybe SPD */ - compatible = "xxx"; - reg = <0x51>; - }; }; i2c@4 { #address-cells = <1>; -- cgit From ccc8a11935214464a4a6a6f4055b4c05a28f735d Mon Sep 17 00:00:00 2001 From: Shubhrajyoti Datta Date: Mon, 3 Sep 2018 15:46:46 +0530 Subject: arm64: zynqmp: Fix i2c boot warning Fix the below warning as the core looks for the compatible string. [ 5.198919] i2c i2c-18: of_i2c: modalias failure on /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@19 [ 5.207454] i2c i2c-18: Failed to create I2C device for /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@19 [ 5.216394] i2c i2c-18: of_i2c: modalias failure on /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@30 [ 5.224986] i2c i2c-18: Failed to create I2C device for /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@30 [ 5.233927] i2c i2c-18: of_i2c: modalias failure on /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@35 [ 5.242527] i2c i2c-18: Failed to create I2C device for /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@35 [ 5.263880] i2c i2c-18: of_i2c: modalias failure on /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@36 [ 5.272477] i2c i2c-18: Failed to create I2C device for /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@36 [ 5.281415] i2c i2c-18: of_i2c: modalias failure on /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@51 [ 5.290008] i2c i2c-18: Failed to create I2C device for /amba/i2c@ff030000/i2c-mux@75/i2c@3/dev@51 Signed-off-by: Shubhrajyoti Datta Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu102-revA.dts | 15 --------------- 1 file changed, 15 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index ba099712aa..0e96a36188 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -485,21 +485,6 @@ #size-cells = <0>; reg = <3>; /* DDR4 SODIMM */ - dev@19 { - reg = <0x19>; - }; - dev@30 { - reg = <0x30>; - }; - dev@35 { - reg = <0x35>; - }; - dev@36 { - reg = <0x36>; - }; - dev@51 { - reg = <0x51>; - }; }; i2c@4 { #address-cells = <1>; -- cgit From 053d4bd4727185f292a0bb2ac080c8c6ae794cbe Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Wed, 14 Nov 2018 17:20:18 +0530 Subject: arm64: zynqmp: Change the spi-rx-bus-width property to x1 As per the zc1275 design x1 mode is enabled so changing the spi-rx-bus-width property to x1. Signed-off-by: Venkatesh Yadav Abbarapu Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zc1275-revB.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp-zc1275-revB.dts b/arch/arm/dts/zynqmp-zc1275-revB.dts index e84b2da164..1a7975b551 100644 --- a/arch/arm/dts/zynqmp-zc1275-revB.dts +++ b/arch/arm/dts/zynqmp-zc1275-revB.dts @@ -47,7 +47,7 @@ #size-cells = <1>; reg = <0x0>; spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; + spi-rx-bus-width = <1>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ partition@qspi-fsbl-uboot { /* for testing purpose */ label = "qspi-fsbl-uboot"; -- cgit