From 621a93e14068787fe07dd31079da9fdf0b312dea Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 25 Apr 2016 12:14:43 +0900 Subject: ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-bus Commit 9f56917ab88a ("dm: core: make simple-bus compatible to simple-mfd") made possible to import the following commit: Linux commit: bc5ba9b98435bf76d92e0954da1784695aa449f1 The SLCR (System-Level Control Registers) block is an MFD (Multi Function Device) rather than a bus. "simple-mfd" seems a more suitable compatible string than "simple-bus". Signed-off-by: Masahiro Yamada Signed-off-by: Michal Simek --- arch/arm/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index a327557c19..b618a3f484 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -251,7 +251,7 @@ slcr: slcr@f8000000 { #address-cells = <1>; #size-cells = <1>; - compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; + compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; reg = <0xF8000000 0x1000>; ranges; clkc: clkc@100 { -- cgit From 9a23f458cbddfbfb67033a2aa60397821698a8a7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 3 May 2016 14:20:17 +0200 Subject: ARM: zynq: Add support for SPL_LOAD_FIT Enable minimal function to be able to compile SPL_LOAD_FIT. Signed-off-by: Michal Simek --- arch/arm/mach-zynq/spl.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c index 723019d252..998896519b 100644 --- a/arch/arm/mach-zynq/spl.c +++ b/arch/arm/mach-zynq/spl.c @@ -90,3 +90,13 @@ __weak void ps7_init(void) * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists. */ } + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif -- cgit From f44e603f73ea43268f0858b9aa4daf962f1eb347 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 10 May 2016 07:55:52 +0200 Subject: ARM: zynq: Call ps7_post_config() for SPL If ps7_post_config() is defined call it. It is enabling for example level shifters for PL bitstreams. Signed-off-by: Michal Simek --- arch/arm/mach-zynq/spl.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c index 998896519b..6c5415ac8f 100644 --- a/arch/arm/mach-zynq/spl.c +++ b/arch/arm/mach-zynq/spl.c @@ -91,6 +91,21 @@ __weak void ps7_init(void) */ } +__weak int ps7_post_config(void) +{ + /* + * This function is overridden by the one in + * board/xilinx/zynq/(platform)/ps7_init_gpl.c, if it exists. + */ + return 0; +} + +void spl_board_prepare_for_boot(void) +{ + ps7_post_config(); + debug("SPL bye\n"); +} + #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { -- cgit From 0a8c4f67f3783eaf5330953b957e232dde747331 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Thu, 12 May 2016 13:44:01 +0200 Subject: ARM64: zynqmp: Align gic ranges for 64k in device tree The GIC ranges in the zynqmp device tree are only 4kb aligned. Since commit 12e14066f we automatically deal with aliases GIC regions though, so we can map them transparently into guests even on 64kb page size systems. This patch makes use of that features and sets GICC and GICV to 64kb aligned and sized regions. Signed-off-by: Alexander Graf Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index fb95b4828b..c6ba872807 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -253,9 +253,9 @@ compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; reg = <0x0 0xf9010000 0x10000>, - <0x0 0xf902f000 0x2000>, + <0x0 0xf9020000 0x20000>, <0x0 0xf9040000 0x20000>, - <0x0 0xf906f000 0x2000>; + <0x0 0xf9060000 0x20000>; interrupt-controller; interrupt-parent = <&gic>; interrupts = <1 9 0xf04>; -- cgit From c9811e14cfee68e3df054fd1597064f58c4e7e27 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 22 Feb 2016 09:57:27 +0100 Subject: ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSI Add missing u-boot,dm-pre-reloc to get IPs initialized. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index c6ba872807..619450e1ba 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -264,6 +264,7 @@ amba: amba { compatible = "simple-bus"; + u-boot,dm-pre-reloc; #address-cells = <2>; #size-cells = <1>; ranges = <0 0 0 0 0xffffffff>; @@ -674,6 +675,7 @@ }; sdhci0: sdhci@ff160000 { + u-boot,dm-pre-reloc; compatible = "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; @@ -685,6 +687,7 @@ }; sdhci1: sdhci@ff170000 { + u-boot,dm-pre-reloc; compatible = "arasan,sdhci-8.9a"; status = "disabled"; interrupt-parent = <&gic>; @@ -776,6 +779,7 @@ }; uart0: serial@ff000000 { + u-boot,dm-pre-reloc; compatible = "cdns,uart-r1p12", "xlnx,xuartps"; status = "disabled"; interrupt-parent = <&gic>; @@ -786,6 +790,7 @@ }; uart1: serial@ff010000 { + u-boot,dm-pre-reloc; compatible = "cdns,uart-r1p12", "xlnx,xuartps"; status = "disabled"; interrupt-parent = <&gic>; -- cgit From e6a9ed04e78cf87ec97e306fa4e7a1669ef98df6 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 20 Nov 2015 13:17:22 +0100 Subject: ARM64: zynqmp: Add SPL support support Support RAM and MMC boot mode in SPL also with SPL_FIT images. In MMC boot mode two boot options are available: 1) Boot flow with ATF(EL3) and full U-Boot(EL2): aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000 -d bl31.bin atf.ub cp spl/boot.bin cp atf.ub cp u-boot.bin 2) Boot flow with full U-Boot(EL3): cp spl/boot.bin cp u-boot*.img 3) emmc boot mode dd if=/dev/zero of=sd.img bs=1024 count=1024 parted sd.img mktable msdos parted sd.img mkpart p fat32 0% 100% kpartx -a sd.img mkfs.vfat /dev/mapper/loop0p1 mount /dev/mapper/loop0p1 /mnt/ cp spl/boot.bin /mnt cp u-boot.img /mnt cp u-boot.bin /mnt cp atf.ub /mnt umount /dev/mapper/loop0p1 kpartx -d sd.img cp sd.img /tftpboot/ and program it via u-boot tftpb 10000 sd.img mmcinfo mmc write 10000 0 $filesize mmc rescan mmc part ls mmc 0 psu_init() function contains low level SoC setup generated for every HW design by Xilinx design tools. xil_io.h is only supporting file to fix all dependencies from tools. The same solution was used on Xilinx Zynq. The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which stays at the same location all the time. Bootrom expects starting address to be at 0xfffc0000 that's why this address is SPL_TEXT_BASE. Signed-off-by: Michal Simek --- arch/arm/Kconfig | 1 + arch/arm/cpu/armv8/zynqmp/Makefile | 1 + arch/arm/cpu/armv8/zynqmp/spl.c | 107 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 + 4 files changed, 111 insertions(+) create mode 100644 arch/arm/cpu/armv8/zynqmp/spl.c (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6b65d8e76a..729b1816bf 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -594,6 +594,7 @@ config ARCH_ZYNQMP select DM select OF_CONTROL select DM_SERIAL + select SUPPORT_SPL config TEGRA bool "NVIDIA Tegra" diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile b/arch/arm/cpu/armv8/zynqmp/Makefile index d0ed2223ff..be8673a7db 100644 --- a/arch/arm/cpu/armv8/zynqmp/Makefile +++ b/arch/arm/cpu/armv8/zynqmp/Makefile @@ -9,3 +9,4 @@ obj-y += clk.o obj-y += cpu.o obj-$(CONFIG_MP) += mp.o obj-y += slcr.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c new file mode 100644 index 0000000000..e3e2a4fb5a --- /dev/null +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -0,0 +1,107 @@ +/* + * Copyright 2015 - 2016 Xilinx, Inc. + * + * Michal Simek + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +#include +#include +#include +#include + +void board_init_f(ulong dummy) +{ + psu_init(); + board_early_init_r(); + +#ifdef CONFIG_DEBUG_UART + /* Uart debug for sure */ + debug_uart_init(); + puts("Debug uart enabled\n"); /* or printch() */ +#endif + /* Delay is required for clocks to be propagated */ + udelay(1000000); + + /* Clear the BSS */ + memset(__bss_start, 0, __bss_end - __bss_start); + + /* No need to call timer init - it is empty for ZynqMP */ + board_init_r(NULL, 0); +} + +#ifdef CONFIG_SPL_BOARD_INIT +void spl_board_init(void) +{ + preloader_console_init(); + board_init(); +} +#endif + +u32 spl_boot_device(void) +{ + u32 reg = 0; + u8 bootmode; + + reg = readl(&crlapb_base->boot_mode); + bootmode = reg & BOOT_MODES_MASK; + + switch (bootmode) { + case JTAG_MODE: + return BOOT_DEVICE_RAM; +#ifdef CONFIG_SPL_MMC_SUPPORT + case EMMC_MODE: + case SD_MODE: + case SD_MODE1: + return BOOT_DEVICE_MMC1; +#endif + default: + printf("Invalid Boot Mode:0x%x\n", bootmode); + break; + } + + return 0; +} + +u32 spl_boot_mode(void) +{ + switch (spl_boot_device()) { + case BOOT_DEVICE_RAM: + return 0; + case BOOT_DEVICE_MMC1: + return MMCSD_MODE_FS; + default: + puts("spl: error: unsupported device\n"); + hang(); + } +} + +__weak void psu_init(void) +{ + /* + * This function is overridden by the one in + * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists. + */ +} + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + return 0; +} +#endif + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 021626dc14..1db2bd6a4f 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -17,4 +17,6 @@ int zynq_slcr_get_mio_pin_status(const char *periph); unsigned int zynqmp_get_silicon_version(void); +void psu_init(void); + #endif /* _ASM_ARCH_SYS_PROTO_H */ -- cgit From ad5b5801264e573bfbf17a20b04c546985c5bfc1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 20 May 2016 14:59:33 +0200 Subject: ARM: zynq: Simplify zynq configuration Extending Kconfig for adding new platform is a lot of work for nothing. Setting SYS_CONFIG_NAME directly in Kconfig and remove all dependencies on TARGET_ZYNQ_* options including SPL. As a side-effect it also remove custom init folder for ps7_init_gpl.* files. Folder is chosen based on device-tree file. Signed-off-by: Michal Simek --- arch/arm/mach-zynq/Kconfig | 48 ++++++---------------------------------------- 1 file changed, 6 insertions(+), 42 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index d396a13b6f..db3c579293 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -1,41 +1,5 @@ if ARCH_ZYNQ -config ZYNQ_CUSTOM_INIT - bool "Use custom ps7_init provided by Xilinx tool" - help - U-Boot includes ps7_init_gpl.[ch] for some Zynq board variants. - If you want to override them with customized ones - or ps7_init code for your board is missing, please say Y here - and add ones into board/xilinx/zynq/custom_hw_platform/ directory. - -choice - prompt "Xilinx Zynq board select" - default TARGET_ZYNQ_ZC702 - -config TARGET_ZYNQ_ZED - bool "Zynq ZedBoard" - -config TARGET_ZYNQ_MICROZED - bool "Zynq MicroZed" - -config TARGET_ZYNQ_PICOZED - bool "Zynq PicoZed" - -config TARGET_ZYNQ_ZC702 - bool "Zynq ZC702 Board" - -config TARGET_ZYNQ_ZC706 - bool "Zynq ZC706 Board" - -config TARGET_ZYNQ_ZC770 - bool "Zynq ZC770 Board" - select ZYNQ_CUSTOM_INIT - -config TARGET_ZYNQ_ZYBO - bool "Zynq Zybo Board" - -endchoice - config SYS_BOARD default "zynq" @@ -46,11 +10,11 @@ config SYS_SOC default "zynq" config SYS_CONFIG_NAME - default "zynq_zed" if TARGET_ZYNQ_ZED - default "zynq_microzed" if TARGET_ZYNQ_MICROZED - default "zynq_picozed" if TARGET_ZYNQ_PICOZED - default "zynq_zc70x" if TARGET_ZYNQ_ZC702 || TARGET_ZYNQ_ZC706 - default "zynq_zc770" if TARGET_ZYNQ_ZC770 - default "zynq_zybo" if TARGET_ZYNQ_ZYBO + string "Board configuration name" + default "zynq-common" + help + This option contains information about board configuration name. + Based on this option include/configs/.h header + will be used for board configuration. endif -- cgit