From 4393fd40adcf9533a42f8380f8e822fe16c833da Mon Sep 17 00:00:00 2001 From: poonam aggrwal Date: Fri, 24 Jan 2014 02:24:59 +0530 Subject: powerpc/mpc85xx: Update LIODNs for T1040 Removed LIODNs for RMAN, RIO, 10G. T1040 has 10 QMAN portals so assigned LIODNs accordingly. Signed-off-by: Poonam Aggrwal Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/t1040_ids.c | 36 ------------------------------------ 1 file changed, 36 deletions(-) (limited to 'arch/powerpc/cpu') diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c b/arch/powerpc/cpu/mpc85xx/t1040_ids.c index 32075ce220..68160a9512 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c @@ -21,21 +21,6 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { SET_QP_INFO(8, 34, 1, 3), SET_QP_INFO(9, 35, 1, 0), SET_QP_INFO(10, 36, 1, 0), - SET_QP_INFO(11, 37, 1, 1), - SET_QP_INFO(12, 38, 1, 1), - SET_QP_INFO(13, 39, 1, 2), - SET_QP_INFO(14, 40, 1, 2), - SET_QP_INFO(15, 41, 1, 3), - SET_QP_INFO(16, 42, 1, 3), - SET_QP_INFO(17, 43, 1, 0), - SET_QP_INFO(18, 44, 1, 0), - SET_QP_INFO(19, 45, 1, 1), - SET_QP_INFO(20, 46, 1, 1), - SET_QP_INFO(21, 47, 1, 2), - SET_QP_INFO(22, 48, 1, 2), - SET_QP_INFO(23, 49, 1, 3), - SET_QP_INFO(24, 50, 1, 3), - SET_QP_INFO(25, 51, 1, 0), }; #endif @@ -60,11 +45,6 @@ struct liodn_id_table liodn_tbl[] = { SET_DMA_LIODN(1, 147), SET_DMA_LIODN(2, 227), - SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0), - SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0), - SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0), - SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0), - /* SET_NEXUS_LIODN(557), -- not yet implemented */ }; int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); @@ -77,8 +57,6 @@ struct liodn_id_table fman1_liodn_tbl[] = { SET_FMAN_RX_1G_LIODN(1, 3, 91), SET_FMAN_RX_1G_LIODN(1, 4, 92), SET_FMAN_RX_1G_LIODN(1, 5, 93), - SET_FMAN_RX_10G_LIODN(1, 0, 94), - SET_FMAN_RX_10G_LIODN(1, 1, 95), }; int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); #endif @@ -97,23 +75,9 @@ struct liodn_id_table sec_liodn_tbl[] = { }; int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); -#ifdef CONFIG_SYS_DPAA_RMAN -struct liodn_id_table rman_liodn_tbl[] = { - /* Set RMan block 0-3 liodn offset */ - SET_RMAN_LIODN(0, 678), - SET_RMAN_LIODN(1, 679), - SET_RMAN_LIODN(2, 680), - SET_RMAN_LIODN(3, 681), -}; -int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); -#endif - struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(462, 558), #ifdef CONFIG_SYS_DPAA_FMAN [FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973), #endif -#ifdef CONFIG_SYS_DPAA_RMAN - [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(922), -#endif }; -- cgit From 96bda02c9e3a209a1e972a337937c9c43fc538f6 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Fri, 24 Jan 2014 17:51:50 +0530 Subject: powerpc/mpc85xx: Update serdes protocols for T1040 T1040 has only one SerDes block. so update the code accordingly. Also, add support of SerDes Protocol 0x00, 0x06, 0x40, 0x69 0x85, 0xA7 and 0xAA Signed-off-by: Arpit Goel Signed-off-by: Poonam Aggrwal Signed-off-by: Priyanka Jain Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 2 + arch/powerpc/cpu/mpc85xx/t1040_serdes.c | 63 +++++++++++--------------- 2 files changed, 29 insertions(+), 36 deletions(-) (limited to 'arch/powerpc/cpu') diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index 25db899e5f..70e09eaed5 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -75,6 +75,8 @@ static const char *serdes_prtcl_str[] = { [XFI_FM2_MAC9] = "XFI_FM2_MAC9", [XFI_FM2_MAC10] = "XFI_FM2_MAC10", [INTERLAKEN] = "INTERLAKEN", + [QSGMII_SW1_A] = "QSGMII_SW1_A", + [QSGMII_SW1_B] = "QSGMII_SW1_B", }; #endif diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c index 94814ac13e..d86bb27372 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c @@ -8,68 +8,59 @@ #include #include #include -#include "fsl_corenet2_serdes.h" -static u8 serdes_cfg_tbl[MAX_SERDES][0xC4][SRDS_MAX_LANES] = { - { /* SerDes 1 */ - [0x69] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B, - PCIE2, PCIE3, SGMII_FM1_DTSEC4, SATA1}, + +static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { + [0x00] = {PCIE1, PCIE1, PCIE1, PCIE1, + PCIE2, PCIE2, PCIE2, PCIE2}, + [0x06] = {PCIE1, PCIE1, PCIE1, PCIE1, + PCIE2, PCIE3, PCIE4, SATA1}, + [0x08] = {PCIE1, PCIE1, PCIE1, PCIE1, + PCIE2, PCIE3, SATA2, SATA1}, + [0x40] = {PCIE1, PCIE1, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + PCIE2, PCIE2, PCIE2, PCIE2}, + [0x60] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B, + PCIE2, PCIE2, PCIE2, PCIE2}, [0x66] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B, PCIE2, PCIE3, PCIE4, SATA1}, [0x67] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B, PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5}, - [0x60] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B, - PCIE2, PCIE2, PCIE2, PCIE2}, - [0x8D] = {PCIE1, SGMII_SW1_DTSEC3, SGMII_SW1_DTSEC1, SGMII_SW1_DTSEC2, - PCIE2, SGMII_SW1_DTSEC6, SGMII_SW1_DTSEC4, SGMII_SW1_DTSEC5}, - [0x89] = {PCIE1, SGMII_SW1_DTSEC3, SGMII_SW1_DTSEC1, SGMII_SW1_DTSEC2, - PCIE2, PCIE3, SGMII_SW1_DTSEC4, SATA1}, + [0x69] = {PCIE1, SGMII_FM1_DTSEC3, QSGMII_SW1_A, QSGMII_SW1_B, + PCIE2, PCIE3, SGMII_FM1_DTSEC4, SATA1}, [0x86] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2, PCIE3, PCIE4, SATA1}, + [0x85] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, [0x87] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5}, - [0xA7] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, - PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5}, - [0xAA] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, - PCIE2, PCIE3, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, - [0x40] = {PCIE1, PCIE1, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, - PCIE2, PCIE2, PCIE2, PCIE2}, - [0x06] = {PCIE1, PCIE1, PCIE1, PCIE1, - PCIE2, PCIE3, PCIE4, SATA1}, - [0x08] = {PCIE1, PCIE1, PCIE1, PCIE1, - PCIE2, PCIE3, SATA2, SATA1}, + [0x89] = {PCIE1, QSGMII_SW1_A, QSGMII_SW1_A, QSGMII_SW1_A, + PCIE2, PCIE3, QSGMII_SW1_B, SATA1}, + [0x8D] = {PCIE1, QSGMII_SW1_A, QSGMII_SW1_A, QSGMII_SW1_A, + PCIE2, QSGMII_SW1_B, QSGMII_SW1_B, QSGMII_SW1_B}, [0x8F] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, AURORA, NONE, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, - [0x85] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, - PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, [0xA5] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2, PCIE2, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, - [0x00] = {PCIE1, PCIE1, PCIE1, PCIE1, - PCIE2, PCIE2, PCIE2, PCIE2}, - }, - { - }, - { - }, - { - }, + [0xA7] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + PCIE2, PCIE3, PCIE4, SGMII_FM1_DTSEC5}, + [0xAA] = {PCIE1, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + PCIE2, PCIE3, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5}, }; - enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) { - return serdes_cfg_tbl[serdes][cfg][lane]; + return serdes_cfg_tbl[cfg][lane]; } int is_serdes_prtcl_valid(int serdes, u32 prtcl) { int i; - if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl[serdes])) + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl)) return 0; for (i = 0; i < SRDS_MAX_LANES; i++) { - if (serdes_cfg_tbl[serdes][prtcl][i] != NONE) + if (serdes_cfg_tbl[prtcl][i] != NONE) return 1; } -- cgit