From 2b3a1cdd9ed14441ae91845851aaf91adddbafc0 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 3 Oct 2011 08:37:57 -0500 Subject: powerpc/mpc8548: Add workaround for erratum NMG_LBC103 The erratum NMG_LBC103 is LBIU3 in MPC8548 errata document. Any local bus transaction may fail during LBIU resynchronization process when the clock divider [CLKDIV] is changing. Ensure there is no transaction on the local bus for at least 100 microseconds after changing clock divider LCRR[CLKDIV]. Refer to the erratum LBIU3 of mpc8548. Signed-off-by: Zhao Chenhui Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/config_mpc85xx.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index a0a12b23e7..fc78c58d03 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -63,6 +63,7 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120 +#define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 #elif defined(CONFIG_MPC8555) #define CONFIG_MAX_CPUS 1 -- cgit