From 7cb7272365983e3a1eedf18a9f688c825e1cf95e Mon Sep 17 00:00:00 2001 From: Tang Yuantian Date: Fri, 4 Jul 2014 17:39:26 +0800 Subject: mpc85xx/t104x: Enable L2 and CPC cache when resume When resume from deep sleep, uboot needs to enable L2 and CPC cache, or they would be keeping unusable in kernel because kernel didn't enble or initialized them. This patch didn't change the existing L2 cache enabling code, just put them in a function. Signed-off-by: Tang Yuantian Reviewed-by: York Sun --- arch/powerpc/lib/board.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/powerpc/lib/board.c') diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 300ab12a3b..50eb820336 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -370,6 +370,11 @@ void board_init_f(ulong bootflag) #ifdef CONFIG_DEEP_SLEEP /* Jump to kernel in deep sleep case */ if (in_be32(&gur->scrtsr[0]) & (1 << 3)) { + l2cache_init(); +#if defined(CONFIG_RAMBOOT_PBL) + disable_cpc_sram(); +#endif + enable_cpc(); start_addr = in_be32(&scfg->sparecr[1]); kernel_resume = (func_t)start_addr; kernel_resume(); -- cgit