From fbfd92bf9bdc39d6537806ab58a83a48e5a2c004 Mon Sep 17 00:00:00 2001 From: Lukas Auer Date: Wed, 21 Aug 2019 21:14:43 +0200 Subject: riscv: add run mode configuration for SPL U-Boot SPL can be run in a different privilege mode from U-Boot proper. Add new configuration entries for SPL to allow the run mode to be configured independently of U-Boot proper. Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE configuration symbols to also cover the SPL equivalents. Ensure that files compatible with only one privilege mode are not included in builds targeting an incompatible privilege mode. Signed-off-by: Lukas Auer Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Anup Patel --- arch/riscv/cpu/generic/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/riscv/cpu/generic/Kconfig') diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index 1d6ab5032d..b7552f539f 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -8,5 +8,5 @@ config GENERIC_RISCV imply CPU imply CPU_RISCV imply RISCV_TIMER - imply SIFIVE_CLINT if RISCV_MMODE + imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE) imply CMD_CPU -- cgit From 8c59f2023cc8d4ab32b3988193ff2eb116df5995 Mon Sep 17 00:00:00 2001 From: Lukas Auer Date: Wed, 21 Aug 2019 21:14:45 +0200 Subject: riscv: add SPL support U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode. To be able to use SPL, boards have to provide a supported SPL boot device. Signed-off-by: Lukas Auer Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Anup Patel --- arch/riscv/cpu/generic/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/riscv/cpu/generic/Kconfig') diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index b7552f539f..b2cb155d6d 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -10,3 +10,6 @@ config GENERIC_RISCV imply RISCV_TIMER imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE) imply CMD_CPU + imply SPL_CPU_SUPPORT + imply SPL_OPENSBI + imply SPL_LOAD_FIT -- cgit