From 1b3c8d64020f835823aedc1c4d293e34a78bd1b8 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Mon, 9 Mar 2020 19:35:30 -0700 Subject: riscv: Introduce a new config for SBI v0.1 We now have SBI v0.2 which is more scalable and extendable to handle future needs for RISC-V supervisor interfaces. Introduce a new config and move all SBI v0.1 code under that config. This allows to implement the new replacement SBI extensions cleanly and remove v0.1 extensions easily in future. Currently, the config is enabled by default. Once all M-mode software, with v0.1, is no longer in use, this config option and all relevant code can be easily removed. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407361/ Signed-off-by: Bin Meng Reviewed-by: Pragnesh Patel --- arch/riscv/include/asm/sbi.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/riscv/include/asm') diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 6d3114c622..c65104f492 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -12,6 +12,7 @@ #include enum sbi_ext_id { +#ifdef CONFIG_SBI_V01 SBI_EXT_0_1_SET_TIMER = 0x0, SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1, SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2, @@ -21,6 +22,7 @@ enum sbi_ext_id { SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6, SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, SBI_EXT_0_1_SHUTDOWN = 0x8, +#endif SBI_EXT_BASE = 0x10, SBI_EXT_TIME = 0x54494D45, SBI_EXT_IPI = 0x735049, @@ -75,10 +77,12 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, unsigned long arg3, unsigned long arg4, unsigned long arg5); +#ifdef CONFIG_SBI_V01 void sbi_console_putchar(int ch); int sbi_console_getchar(void); void sbi_clear_ipi(void); void sbi_shutdown(void); +#endif void sbi_set_timer(uint64_t stime_value); void sbi_send_ipi(const unsigned long *hart_mask); void sbi_remote_fence_i(const unsigned long *hart_mask); -- cgit