From fe3fbd302427b3690c4d682c1d7d03ca94771afd Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Thu, 30 Jul 2015 03:49:18 -0700
Subject: x86: bayleybay: Configure PCI IRQ

Add PCI IRQ routing information in the board device tree and enable
writing PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
 arch/x86/cpu/baytrail/valleyview.c | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'arch/x86/cpu')

diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index 9915da5bd7..d8d2b8d418 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <mmc.h>
 #include <pci_ids.h>
+#include <asm/irq.h>
 #include <asm/post.h>
 
 static struct pci_device_id mmc_supported[] = {
@@ -35,3 +36,10 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+int arch_misc_init(void)
+{
+	pirq_init();
+
+	return 0;
+}
-- 
cgit