From 03c2288070155ee88d0c3341748a1b2b13418d8c Mon Sep 17 00:00:00 2001 From: Suneel Garapati Date: Sat, 19 Oct 2019 18:37:55 -0700 Subject: arm: octeontx: Add support for OcteonTX SoC platforms This patch adds support for all OcteonTX 81xx/83xx boards from Marvell. For 81xx boards, use octeontx_81xx_defconfig and for 83xx boards, use octeontx_83xx_defconfig. Signed-off-by: Suneel Garapati --- arch/arm/Kconfig | 10 +++++ arch/arm/Makefile | 1 + arch/arm/mach-octeontx/Kconfig | 23 ++++++++++ arch/arm/mach-octeontx/Makefile | 9 ++++ arch/arm/mach-octeontx/clock.c | 35 ++++++++++++++++ arch/arm/mach-octeontx/cpu.c | 76 ++++++++++++++++++++++++++++++++++ arch/arm/mach-octeontx/lowlevel_init.S | 33 +++++++++++++++ 7 files changed, 187 insertions(+) create mode 100644 arch/arm/mach-octeontx/Kconfig create mode 100644 arch/arm/mach-octeontx/Makefile create mode 100644 arch/arm/mach-octeontx/clock.c create mode 100644 arch/arm/mach-octeontx/cpu.c create mode 100644 arch/arm/mach-octeontx/lowlevel_init.S (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9b8dadce83..f5f668944f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1728,6 +1728,14 @@ config ARCH_ROCKCHIP imply TPL_SYSRESET imply USB_FUNCTION_FASTBOOT +config ARCH_OCTEONTX + bool "Support OcteonTX SoCs" + select DM + select ARM64 + select OF_CONTROL + select OF_LIVE + select BOARD_LATE_INIT + select SYS_CACHE_SHIFT_7 config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" select ARM64 @@ -1826,6 +1834,7 @@ source "arch/arm/mach-lpc32xx/Kconfig" source "arch/arm/mach-mvebu/Kconfig" +source "arch/arm/mach-octeontx/Kconfig" source "arch/arm/cpu/armv7/ls102xa/Kconfig" source "arch/arm/mach-imx/mx2/Kconfig" @@ -1909,6 +1918,7 @@ source "board/bosch/guardian/Kconfig" source "board/CarMediaLab/flea3/Kconfig" source "board/Marvell/aspenite/Kconfig" source "board/Marvell/gplugd/Kconfig" +source "board/Marvell/octeontx/Kconfig" source "board/armadeus/apf27/Kconfig" source "board/armltd/vexpress/Kconfig" source "board/armltd/vexpress64/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index bf3890e99b..87b4198312 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -80,6 +80,7 @@ machine-$(CONFIG_ARCH_STM32MP) += stm32mp machine-$(CONFIG_ARCH_SUNXI) += sunxi machine-$(CONFIG_ARCH_TEGRA) += tegra machine-$(CONFIG_ARCH_U8500) += u8500 +machine-$(CONFIG_ARCH_OCTEONTX) += octeontx machine-$(CONFIG_ARCH_UNIPHIER) += uniphier machine-$(CONFIG_ARCH_VERSAL) += versal machine-$(CONFIG_ARCH_ZYNQ) += zynq diff --git a/arch/arm/mach-octeontx/Kconfig b/arch/arm/mach-octeontx/Kconfig new file mode 100644 index 0000000000..28ecf9821f --- /dev/null +++ b/arch/arm/mach-octeontx/Kconfig @@ -0,0 +1,23 @@ +if ARCH_OCTEONTX + +choice + prompt "OcteonTX board select" + optional + +config TARGET_OCTEONTX_81XX + bool "Marvell OcteonTX CN81XX" + +config TARGET_OCTEONTX_83XX + bool "Marvell OcteonTX CN83XX" + +endchoice + +config SYS_SOC + string + default "octeontx" + +config SYS_PCI_64BIT + bool + default y + +endif diff --git a/arch/arm/mach-octeontx/Makefile b/arch/arm/mach-octeontx/Makefile new file mode 100644 index 0000000000..20cb48ad92 --- /dev/null +++ b/arch/arm/mach-octeontx/Makefile @@ -0,0 +1,9 @@ +#/* SPDX-License-Identifier: GPL-2.0 +# * +# * Copyright (C) 2018 Marvell International Ltd. +# * +# * https://spdx.org/licenses +# */ + +obj-y += lowlevel_init.o clock.o cpu.o + diff --git a/arch/arm/mach-octeontx/clock.c b/arch/arm/mach-octeontx/clock.c new file mode 100644 index 0000000000..9da21077ec --- /dev/null +++ b/arch/arm/mach-octeontx/clock.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * https://spdx.org/licenses + */ + +#include +#include +#include +#include + +/** + * Returns the I/O clock speed in Hz + */ +u64 octeontx_get_io_clock(void) +{ + union rst_boot rst_boot; + + rst_boot.u = readq(RST_BOOT); + + return rst_boot.s.pnr_mul * PLL_REF_CLK; +} + +/** + * Returns the core clock speed in Hz + */ +u64 octeontx_get_core_clock(void) +{ + union rst_boot rst_boot; + + rst_boot.u = readq(RST_BOOT); + + return rst_boot.s.c_mul * PLL_REF_CLK; +} diff --git a/arch/arm/mach-octeontx/cpu.c b/arch/arm/mach-octeontx/cpu.c new file mode 100644 index 0000000000..9c29c31393 --- /dev/null +++ b/arch/arm/mach-octeontx/cpu.c @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * https://spdx.org/licenses + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define OTX_MEM_MAP_USED 3 + +/* 1 for 83xx, +1 is end of list which needs to be empty */ +#define OTX_MEM_MAP_MAX (OTX_MEM_MAP_USED + 1 + CONFIG_NR_DRAM_BANKS + 1) + +static struct mm_region otx_mem_map[OTX_MEM_MAP_MAX] = { + { + .virt = 0x800000000000UL, + .phys = 0x800000000000UL, + .size = 0x40000000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, { + .virt = 0x840000000000UL, + .phys = 0x840000000000UL, + .size = 0x40000000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + }, { + .virt = 0x880000000000UL, + .phys = 0x880000000000UL, + .size = 0x40000000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE + } + +}; + +struct mm_region *mem_map = otx_mem_map; + +void mem_map_fill(void) +{ + int banks = OTX_MEM_MAP_USED; + u32 dram_start = CONFIG_SYS_TEXT_BASE; + + if (otx_is_soc(CN83XX)) { + otx_mem_map[banks].virt = 0x8c0000000000UL; + otx_mem_map[banks].phys = 0x8c0000000000UL; + otx_mem_map[banks].size = 0x40000000000UL; + otx_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE; + banks = banks + 1; + } + + for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + otx_mem_map[banks].virt = dram_start; + otx_mem_map[banks].phys = dram_start; + otx_mem_map[banks].size = gd->ram_size; + otx_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_NON_SHARE; + banks = banks + 1; + } +} + +u64 get_page_table_size(void) +{ + return 0x80000; +} + +void reset_cpu(ulong addr) +{ +} diff --git a/arch/arm/mach-octeontx/lowlevel_init.S b/arch/arm/mach-octeontx/lowlevel_init.S new file mode 100644 index 0000000000..41a9f08aed --- /dev/null +++ b/arch/arm/mach-octeontx/lowlevel_init.S @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2018 Marvell International Ltd. + * + * https://spdx.org/licenses + */ + +#include +#include +#include + +.align 8 +.global fdt_base_addr +fdt_base_addr: + .dword 0x0 + +.global save_boot_params +save_boot_params: + /* Read FDT base from x1 register passed by ATF */ + adr x21, fdt_base_addr + str x1, [x21] + + /* Returns */ + b save_boot_params_ret + +ENTRY(lowlevel_init) + mov x29, lr /* Save LR */ + + /* any lowlevel init should go here */ + + mov lr, x29 /* Restore LR */ + ret +ENDPROC(lowlevel_init) -- cgit