From bb413337826ef1a1445ff9fb33424fd231430228 Mon Sep 17 00:00:00 2001 From: Ramon Fried Date: Sat, 27 Apr 2019 11:15:23 +0300 Subject: pci_ep: add pci endpoint sandbox driver Add a dummy PCI endpoint for sandbox. Supporting only a single function, it allows setting and reading header configuration. Signed-off-by: Ramon Fried Reviewed-by: Simon Glass --- arch/Kconfig | 2 ++ arch/sandbox/dts/test.dts | 4 ++++ 2 files changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/Kconfig b/arch/Kconfig index 28afe39801..355d214522 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -90,6 +90,7 @@ config SANDBOX select DM_SPI_FLASH select HAVE_BLOCK_DEVICE select LZO + select PCI_ENDPOINT select SPI select SUPPORT_OF_CONTROL imply BITREVERSE @@ -120,6 +121,7 @@ config SANDBOX imply VIRTIO_BLK imply VIRTIO_NET imply DM_SOUND + imply PCI_SANDBOX_EP imply PCH config SH diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index c328258901..a7a566c0d8 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -487,6 +487,10 @@ }; }; + pci_ep: pci_ep { + compatible = "sandbox,pci_ep"; + }; + probing { compatible = "simple-bus"; test1 { -- cgit From f2a55acfcf7a605f114a45eafa8a349341680f42 Mon Sep 17 00:00:00 2001 From: Ramon Fried Date: Sat, 27 Apr 2019 11:15:24 +0300 Subject: test: pci_ep: add basic pci_ep tests Add basic PCI endpoint sandbox testing. Signed-off-by: Ramon Fried Reviewed-by: Simon Glass --- arch/sandbox/include/asm/test.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index e956a05262..7ec9b61008 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -177,4 +177,12 @@ int sandbox_get_beep_frequency(struct udevice *dev); */ int sandbox_get_pch_spi_protect(struct udevice *dev); +/** + * sandbox_get_pci_ep_irq_count() - Get the PCI EP IRQ count + * + * @dev: Device to check + * @return irq count + */ +int sandbox_get_pci_ep_irq_count(struct udevice *dev); + #endif -- cgit From aa13fa71ea20ab1f68ab831aded3d23edc8d5436 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:44 +0200 Subject: arm: spear: Drop useless board_init_r call It is clearly stated that board_init_f should *not* call board_init_r. Indeed, board_init_f should return. The code will continue through arch/arm/lib/crt0.S which will do more setup before calling board_init_r. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/spl.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index d2bddb589a..b004cccafd 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -251,6 +251,4 @@ void board_init_f(ulong dummy) puts("Configure DDR\n"); mpmc_init(); spear_late_init(); - - board_init_r(NULL, 0); } -- cgit From 68cadee6f29f4c76c9a760d7c533ee4113599dbe Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:45 +0200 Subject: arm: spear: Call the SPL 'SPL', not 'Xloader' Rename Xloader as SPL in comments. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index 1cab4ca6fb..e69deb7926 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -33,14 +33,14 @@ reset: /* - * Xloader has to return back to BootROM in a few cases. + * SPL has to return back to BootROM in a few cases. * eg. Ethernet boot, UART boot, USB boot * Saving registers for returning back */ stmdb sp!, {r0-r12,r14} bl cpu_init_crit /* - * Clearing bss area is not done in Xloader. + * Clearing bss area is not done in SPL. * BSS area lies in the DDR location which is not yet initialized * bss is assumed to be uninitialized. */ -- cgit From 58cbb671ef68214ab1aa6566307627ab37e28988 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:46 +0200 Subject: arm: spear: Drop false comment SPL BSS lies in SRAM and is actually initialized to 0 by the SPL in arch/arm/lib/crt0.S:_main(), which is called by cpu_init_crit. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index e69deb7926..4395985549 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -39,11 +39,6 @@ reset: */ stmdb sp!, {r0-r12,r14} bl cpu_init_crit -/* - * Clearing bss area is not done in SPL. - * BSS area lies in the DDR location which is not yet initialized - * bss is assumed to be uninitialized. - */ ldmia sp!, {r0-r12,pc} /* -- cgit From 10a5b3cd99690f138597544629460c16dcfadd16 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:47 +0200 Subject: arm: spear: Fix the main comment in start.S This comment describes the board state at the moment where we enter the SPL. The description is entirely wrong; re-write it to fit the reality. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index 4395985549..c3bb58c55b 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -21,10 +21,9 @@ * * Startup Code (reset vector) * - * Below are the critical initializations already taken place in BootROM. - * So, these are not taken care in Xloader - * 1. Relocation to RAM - * 2. Initializing stacks + * The BootROM already initialized its own stack in the [0-0xb00] reserved + * range of the SRAM. The SPL (in _main) will update the stack pointer to + * its own SRAM area (right before the gd section). * ************************************************************************* */ -- cgit From 76bdaaa196be0c45c7933127fb33c8f9c23f541d Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:48 +0200 Subject: arm: spear: Purely cosmetic changes in start.S Before cleaning a bit further the spear/start.S file, apply a few cosmetic changes: capital letters, comment indentation and small rewriting. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index c3bb58c55b..566cf668b7 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -31,11 +31,10 @@ .globl reset reset: -/* - * SPL has to return back to BootROM in a few cases. - * eg. Ethernet boot, UART boot, USB boot - * Saving registers for returning back - */ + /* + * SPL has to return back to BootROM in a few cases (eg. Ethernet boot, + * UART boot, USB boot): save registers in BootROM's stack. + */ stmdb sp!, {r0-r12,r14} bl cpu_init_crit ldmia sp!, {r0-r12,pc} @@ -52,14 +51,14 @@ reset: */ cpu_init_crit: /* - * flush v4 I/D caches + * Flush v4 I/D caches */ mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ + mcr p15, 0, r0, c7, c7, 0 /* Flush v3/v4 cache */ + mcr p15, 0, r0, c8, c7, 0 /* Flush v4 TLB */ /* - * enable instruction cache + * Enable instruction cache */ mrc p15, 0, r0, c1, c0, 0 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ -- cgit From f30765b74896bcd604decc46e341035f7f3b4961 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:49 +0200 Subject: arm: spear: Use PUSH/POP mnemonics when relevant Quoting ARM "RealView Compilation Tools Assembler Guide v4.0": PUSH and POP are synonyms for STMDB and LDM (or LDMIA), with the base register sp (r13), and the adjusted address written back to the base register. PUSH and POP are the preferred mnemonic in these cases. Let's follow this recommandation to ease the reading and substitute LDMIA/STMDB operations with PUSH/POP mnemonics. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index 566cf668b7..25895f01ac 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -35,9 +35,9 @@ reset: * SPL has to return back to BootROM in a few cases (eg. Ethernet boot, * UART boot, USB boot): save registers in BootROM's stack. */ - stmdb sp!, {r0-r12,r14} + push {r0-r12,r14} bl cpu_init_crit - ldmia sp!, {r0-r12,pc} + pop {r0-r12,pc} /* ************************************************************************* @@ -67,6 +67,6 @@ cpu_init_crit: /* * Go setup Memory and board specific bits prior to relocation. */ - stmdb sp!, {lr} + push {lr} bl _main /* _main will call board_init_f */ - ldmia sp!, {pc} + pop {pc} -- cgit From 08ad72ae811af7ba21c5c270cfe5c7f52c9b8edb Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:50 +0200 Subject: arm: spear: Reference the link register with LR instead of R14 The link register is stored in R14. ARM assembly code allows to use the 'lr' name to reference it instead of 'r14' which is not very meaningful. Do the substitution to ease the reading. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index 25895f01ac..2bc9d5990e 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -35,7 +35,7 @@ reset: * SPL has to return back to BootROM in a few cases (eg. Ethernet boot, * UART boot, USB boot): save registers in BootROM's stack. */ - push {r0-r12,r14} + push {r0-r12,lr} bl cpu_init_crit pop {r0-r12,pc} -- cgit From 6a9d0e275f0edb952541ae4efb0dc394242f9b5a Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:51 +0200 Subject: arm: spear: Simplify start.S organization There is no reason to do the few spear-related initialization, in a different procedure than 'reset'. Spare one branching and get a linear code flow by removing this indirection. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index 2bc9d5990e..5fb2bd12ec 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -36,20 +36,7 @@ reset: * UART boot, USB boot): save registers in BootROM's stack. */ push {r0-r12,lr} - bl cpu_init_crit - pop {r0-r12,pc} -/* - ************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - ************************************************************************* - */ -cpu_init_crit: /* * Flush v4 I/D caches */ @@ -67,6 +54,6 @@ cpu_init_crit: /* * Go setup Memory and board specific bits prior to relocation. */ - push {lr} bl _main /* _main will call board_init_f */ - pop {pc} + + pop {r0-r12,pc} -- cgit From f78fdee9fc157afe35118f01f349aff5aa791c81 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:52 +0200 Subject: arm: spear: Support returning to BootROM Implement the weak board_return_to_bootrom() function so that when enabling the spl_bootrom.c driver, one can make use of usbboot on spear platforms. All necessary information to return to the BootROM are stored in the BootROM's stack. The SPL stack pointer is reset so we save the BootROM's stack pointer into the SPL .data section. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/spl.c | 35 +++++++++++++++++++++++++++++++++-- arch/arm/cpu/arm926ejs/spear/start.S | 7 ++++++- 2 files changed, 39 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index b004cccafd..b2cacf2d3e 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -16,6 +16,12 @@ #include #include +/* Reserve some space to store the BootROM's stack pointer during SPL operation. + * The BSS cannot be used for this purpose because it will be zeroed after + * having stored the pointer, so force the location to the data section. + */ +u32 bootrom_stash_sp __attribute__((section(".data"))); + static void ddr_clock_init(void) { struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; @@ -223,8 +229,9 @@ u32 spl_boot_device(void) { u32 mode = 0; - /* Currently only SNOR is supported as the only */ - if (snor_boot_selected()) { + if (usb_boot_selected()) { + mode = BOOT_DEVICE_BOOTROM; + } else if (snor_boot_selected()) { /* SNOR-SMI initialization */ snor_init(); @@ -252,3 +259,27 @@ void board_init_f(ulong dummy) mpmc_init(); spear_late_init(); } + +/* + * In a few cases (Ethernet, UART or USB boot, we might want to go back into the + * BootROM code right after having initialized a few components like the DRAM). + * The following function is called from SPL common code (board_init_r). + */ +void board_return_to_bootrom(void) +{ + /* + * Retrieve the BootROM's stack pointer and jump back to the start of + * the SPL, where we can easily branch back into the BootROM. Don't do + * it right here because SPL might be compiled in Thumb mode while the + * BootROM expects ARM mode. + */ + asm volatile ("ldr r0, =bootrom_stash_sp;" + "ldr r0, [r0];" + "mov sp, r0;" +#if defined(CONFIG_SPL_SYS_THUMB_BUILD) + "blx back_to_bootrom;" +#else + "bl back_to_bootrom;" +#endif + ); +} diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index 5fb2bd12ec..2cf854eb74 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -29,13 +29,17 @@ */ .globl reset + .globl back_to_bootrom reset: /* * SPL has to return back to BootROM in a few cases (eg. Ethernet boot, - * UART boot, USB boot): save registers in BootROM's stack. + * UART boot, USB boot): save registers in BootROM's stack and then the + * BootROM's stack pointer in the SPL's data section. */ push {r0-r12,lr} + ldr r0, =bootrom_stash_sp + str sp, [r0] /* * Flush v4 I/D caches @@ -56,4 +60,5 @@ reset: */ bl _main /* _main will call board_init_f */ +back_to_bootrom: pop {r0-r12,pc} -- cgit From 6d09581f780644df62f594118156abc638152c15 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:53 +0200 Subject: arm: spear: Do not link the _main branch The _main call is not supposed to return at all: don't link the branch. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/start.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index 2cf854eb74..9ac96291b7 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -57,8 +57,9 @@ reset: /* * Go setup Memory and board specific bits prior to relocation. + * This call is not supposed to return. */ - bl _main /* _main will call board_init_f */ + b _main /* _main will call board_init_f */ back_to_bootrom: pop {r0-r12,pc} -- cgit From 2e8a7202467acc3b40db864468c862327716b0ae Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 7 May 2019 14:18:54 +0200 Subject: arm: spear: Return to BootROM if failing to boot from the main device Overload the weak function board_boot_order() so that besides choosing the main boot device, we can fallback on USB boot by returning in the BootROM, eg. if the NOR flash is empty while it was the primary boot medium. Signed-off-by: Miquel Raynal Reviewed-by: Stefan Roese --- arch/arm/cpu/arm926ejs/spear/spl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index b2cacf2d3e..fc332fb626 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -241,6 +241,18 @@ u32 spl_boot_device(void) return mode; } +void board_boot_order(u32 *spl_boot_list) +{ + spl_boot_list[0] = spl_boot_device(); + + /* + * If the main boot device (eg. NOR) is empty, try to jump back into the + * BootROM for USB boot process. + */ + if (USB_BOOT_SUPPORTED) + spl_boot_list[1] = BOOT_DEVICE_BOOTROM; +} + void board_init_f(ulong dummy) { struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; -- cgit From c76c93a3d5a921152e27aa7adb3bbcf9ec4015e1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 23 May 2019 07:14:07 -0400 Subject: configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMAT The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY). In a few places outside of cmd/ switch to using CONFIG_IS_ENABLED() to test what is set. Signed-off-by: Tom Rini --- arch/arm/mach-imx/hab.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index 24d16299e8..ce50dbe907 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -310,7 +310,7 @@ static ulong get_image_ivt_offset(ulong img_addr) buf = map_sysmem(img_addr, 0); switch (genimg_get_format(buf)) { -#if defined(CONFIG_IMAGE_FORMAT_LEGACY) +#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT) case IMAGE_FORMAT_LEGACY: return (image_get_image_size((image_header_t *)img_addr) + 0x1000 - 1) & ~(0x1000 - 1); -- cgit From b2a2bf41acd7a1111dd67575528f3911086149a6 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 25 May 2019 22:40:35 +0200 Subject: arm: mach-omap2: am33xx: Init pinmux before clock The board_early_init_f() inits clock before initing pinmux. However, the clock configuration code might need to adjust PMIC settings of a PMIC on I2C bus (e.g. board/ti/am335x/board.c does that). If the I2C bus pin muxing is not configured before attempting to communicate with the PMIC, the communication will silently fail and the prcm_init() may configure fast enough CPU clock that the default voltage provided by the PMIC would be insufficient and the platform would become unstable. Signed-off-by: Marek Vasut Cc: Jean-Jacques Hiblot Cc: Tom Rini --- arch/arm/mach-omap2/am33xx/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 5507348981..03460c3eb7 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -375,8 +375,8 @@ void update_rtc_magic(void) */ int board_early_init_f(void) { - prcm_init(); set_mux_conf_regs(); + prcm_init(); #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_RTC_DDR_SUPPORT) update_rtc_magic(); #endif -- cgit