From 8b39df9e78759c3af07466224c03d9a90d2453ca Mon Sep 17 00:00:00 2001
From: Marek Vasut <marek.vasut+renesas@gmail.com>
Date: Fri, 24 Aug 2018 21:37:14 +0200
Subject: sh: tmu: Inline sh_tmu.h

The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
 arch/sh/lib/time.c | 43 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 42 insertions(+), 1 deletion(-)

(limited to 'arch')

diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c
index 9a1d3fb013..a650c9478c 100644
--- a/arch/sh/lib/time.c
+++ b/arch/sh/lib/time.c
@@ -13,7 +13,48 @@
 #include <common.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <sh_tmu.h>
+
+#if defined(CONFIG_CPU_SH3)
+struct tmu_regs {
+	u8	tocr;
+	u8	reserved0;
+	u8	tstr;
+	u8	reserved1;
+	u32	tcor0;
+	u32	tcnt0;
+	u16	tcr0;
+	u16	reserved2;
+	u32	tcor1;
+	u32	tcnt1;
+	u16	tcr1;
+	u16	reserved3;
+	u32	tcor2;
+	u32	tcnt2;
+	u16	tcr2;
+	u16	reserved4;
+	u32	tcpr2;
+};
+#endif /* CONFIG_CPU_SH3 */
+
+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
+struct tmu_regs {
+	u32	reserved;
+	u8	tstr;
+	u8	reserved2[3];
+	u32	tcor0;
+	u32	tcnt0;
+	u16	tcr0;
+	u16	reserved3;
+	u32	tcor1;
+	u32	tcnt1;
+	u16	tcr1;
+	u16	reserved4;
+	u32	tcor2;
+	u32	tcnt2;
+	u16	tcr2;
+	u16	reserved5;
+};
+#endif /* CONFIG_CPU_SH4 */
 
 #define TCR_TPSC 0x07
 #define TSTR_STR0	BIT(0)
-- 
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