From dc7100f4080952798413fb63bb4134b22c57623a Mon Sep 17 00:00:00 2001 From: Aneesh V Date: Mon, 21 Nov 2011 23:33:58 +0000 Subject: armv7: disable L2 cache in cleanup_before_linux() We were not disabling external caches before jumping to kernel. We were flushing all caches including external caches and disabling caches globally in CP15 System Control register. Apparently this is not enough. The bootstrap loader in Linux kernel that does decompression enables data-caches again, flush them after use and disable them before jumping to kernel proper. However, it's not aware of the external caches. Since we have left external cache enabled, external cache will get used once caches are enabled globally, but it's not flushed because decompressor is not aware of external caches. When it jumps to kernel with caches disabled globally, we have stale data in the external cache and a coherency problem. This was breaking the boot for OMAP4 with latest mainline kernel. The solution is to disable external caches in cleanup_before_linux(). With this fix kernel is booting again. Cc: Albert Aribaud Signed-off-by: Aneesh V --- arch/arm/cpu/armv7/cpu.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index 091e3e0842..662c4962e6 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -65,6 +65,7 @@ int cleanup_before_linux(void) * dcache_disable() in turn flushes the d-cache and disables MMU */ dcache_disable(); + v7_outer_cache_disable(); /* * After D-cache is flushed and before it is disabled there may -- cgit