From cd61e86e6d2a86b3affd90eeae3f5c97fe990b04 Mon Sep 17 00:00:00 2001 From: Rick Chen Date: Thu, 14 Nov 2019 13:52:22 +0800 Subject: riscv: ax25-ae350: add SPL configuration This patch provides four configurations which can support U-Boot SPL to boot from RAM or FLASH and then boot FIT image including OpenSBI FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices. With ae350_rv[32|64]_spl_defconfigs: U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode and then load FIT image from RAM device on AE350. With ae350_rv[32|64]_spl_xip_defconfigs: U-Boot SPL can be burned into SPI flash and run in flash in machine mode and then load FIT image from SPI flash or MMC device on AE350. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- board/AndesTech/ax25-ae350/Kconfig | 9 +++++++++ board/AndesTech/ax25-ae350/MAINTAINERS | 4 ++++ board/AndesTech/ax25-ae350/ax25-ae350.c | 27 +++++++++++++++++++++++++++ 3 files changed, 40 insertions(+) (limited to 'board/AndesTech') diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 5e682b679d..321dd0cb10 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -21,9 +21,18 @@ config ENV_SIZE config ENV_OFFSET default 0x140000 if ENV_IS_IN_SPI_FLASH +config SPL_TEXT_BASE + default 0x800000 + +config SPL_OPENSBI_LOAD_ADDR + default 0x01000000 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select RISCV_NDS + select SUPPORT_SPL imply SMP + imply SPL_RAM_SUPPORT + imply SPL_RAM_DEVICE endif diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ax25-ae350/MAINTAINERS index feed5d1298..eebee167c3 100644 --- a/board/AndesTech/ax25-ae350/MAINTAINERS +++ b/board/AndesTech/ax25-ae350/MAINTAINERS @@ -7,3 +7,7 @@ F: configs/ae350_rv32_defconfig F: configs/ae350_rv64_defconfig F: configs/ae350_rv32_xip_defconfig F: configs/ae350_rv64_xip_defconfig +F: configs/ae350_rv32_spl_defconfig +F: configs/ae350_rv64_spl_defconfig +F: configs/ae350_rv32_spl_xip_defconfig +F: configs/ae350_rv64_spl_xip_defconfig diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index b43eebb7a6..b0164a9a47 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -12,6 +12,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -110,3 +111,29 @@ int board_early_init_f(void) return 0; } #endif + +#ifdef CONFIG_SPL +void board_boot_order(u32 *spl_boot_list) +{ + u8 i; + u32 boot_devices[] = { +#ifdef CONFIG_SPL_RAM_SUPPORT + BOOT_DEVICE_RAM, +#endif +#ifdef CONFIG_SPL_MMC_SUPPORT + BOOT_DEVICE_MMC1, +#endif + }; + + for (i = 0; i < ARRAY_SIZE(boot_devices); i++) + spl_boot_list[i] = boot_devices[i]; +} +#endif + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* boot using first FIT config */ + return 0; +} +#endif -- cgit From 7e24518c904d9cab8185a1248a24e86c4ceb19ae Mon Sep 17 00:00:00 2001 From: Rick Chen Date: Thu, 14 Nov 2019 13:52:23 +0800 Subject: riscv: ax25-ae350: Use generic memory size setup To get memory size from device tree instead of get_ram_size(). This can avoid memory access fault in U-Boot proper after PMP configurations in OpenSBI. Signed-off-by: Rick Chen Cc: KC Lin Cc: Alan Kao --- board/AndesTech/ax25-ae350/ax25-ae350.c | 21 ++------------------- 1 file changed, 2 insertions(+), 19 deletions(-) (limited to 'board/AndesTech') diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index b0164a9a47..47e6929365 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -30,29 +30,12 @@ int board_init(void) int dram_init(void) { - unsigned long sdram_base = PHYS_SDRAM_0; - unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; - unsigned long actual_size; - - actual_size = get_ram_size((void *)sdram_base, expected_size); - gd->ram_size = actual_size; - - if (expected_size != actual_size) { - printf("Warning: Only %lu of %lu MiB SDRAM is working\n", - actual_size >> 20, expected_size >> 20); - } - - return 0; + return fdtdec_setup_mem_size_base(); } int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_0; - gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; - gd->bd->bi_dram[1].start = PHYS_SDRAM_1; - gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; - - return 0; + return fdtdec_setup_memory_banksize(); } #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) -- cgit