From 70341e2ed9a0ff98a777febb7b56dbcee4d885c4 Mon Sep 17 00:00:00 2001 From: Wenyou Yang Date: Wed, 3 Feb 2016 10:16:50 +0800 Subject: board: atmel: clean up peripheral clock code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Due to introducing the new peripheral clock handle functions, use these functions to reduce duplicated code. Signed-off-by: Wenyou Yang Tested-by: Heiko Schocher [Rebased on current master, fixup for at91rm9200ek] Signed-off-by: Andreas Bießmann --- board/atmel/sama5d3_xplained/sama5d3_xplained.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'board/atmel/sama5d3_xplained/sama5d3_xplained.c') diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c index 7acb8d0974..c8a5795b1d 100644 --- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c +++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c @@ -184,14 +184,13 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable MPDDR clock */ + /* Enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); -- cgit