From db3232ddb058d0ed0bc31f7c5c296748a1afac67 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 5 Oct 2007 21:28:58 +0200 Subject: ppc4xx: Fix small merge problems with CPCI440 and Acadia boards Signed-off-by: Stefan Roese --- board/esd/cpci440/cpci440.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/esd/cpci440/cpci440.c') diff --git a/board/esd/cpci440/cpci440.c b/board/esd/cpci440/cpci440.c index 43d8a3b3bf..caa6d5591f 100644 --- a/board/esd/cpci440/cpci440.c +++ b/board/esd/cpci440/cpci440.c @@ -79,7 +79,7 @@ int checkboard (void) printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor/1000000); printf("\tPLB: %lu MHz\n", sysinfo.freqPLB/1000000); printf("\tOPB: %lu MHz\n", sysinfo.freqOPB/1000000); - printf("\tEPB: %lu MHz\n", sysinfo.freqEPB/1000000); + printf("\tEBC: %lu MHz\n", sysinfo.freqEBC/1000000); /* * Disable sleep mode in LXT971 -- cgit From b568fd25574181a3b12ae3d66b2913903442cb83 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Thu, 27 Dec 2007 17:03:46 +0100 Subject: Remove CPCI440 board This board never left prototyping state and it became a millstone round my neck. So remove it. Signed-off-by: Matthias Fuchs --- board/esd/cpci440/cpci440.c | 152 -------------------------------------------- 1 file changed, 152 deletions(-) delete mode 100644 board/esd/cpci440/cpci440.c (limited to 'board/esd/cpci440/cpci440.c') diff --git a/board/esd/cpci440/cpci440.c b/board/esd/cpci440/cpci440.c deleted file mode 100644 index caa6d5591f..0000000000 --- a/board/esd/cpci440/cpci440.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * (C) Copyright 2002 - * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include -#include - - -extern void lxt971_no_sleep(void); - - -long int fixed_sdram( void ); - -int board_early_init_f (void) -{ - uint reg; - - /*-------------------------------------------------------------------- - * Setup the external bus controller/chip selects - *-------------------------------------------------------------------*/ - mtdcr( ebccfga, xbcfg ); - reg = mfdcr( ebccfgd ); - mtdcr( ebccfgd, reg | 0x04000000 ); /* Set ATC */ - - mtebc( pb0ap, 0x92015480 ); /* FLASH/SRAM */ - mtebc( pb0cr, 0xFF87A000 ); /* BAS=0xff8 8MB R/W 16-bit */ - /* test-only: other regs still missing... */ - - /*-------------------------------------------------------------------- - * Setup the interrupt controller polarities, triggers, etc. - *-------------------------------------------------------------------*/ - mtdcr( uic0sr, 0xffffffff ); /* clear all */ - mtdcr( uic0er, 0x00000000 ); /* disable all */ - mtdcr( uic0cr, 0x00000009 ); /* SMI & UIC1 crit are critical */ - mtdcr( uic0pr, 0xfffffe13 ); /* per ref-board manual */ - mtdcr( uic0tr, 0x01c00008 ); /* per ref-board manual */ - mtdcr( uic0vr, 0x00000001 ); /* int31 highest, base=0x000 */ - mtdcr( uic0sr, 0xffffffff ); /* clear all */ - - mtdcr( uic1sr, 0xffffffff ); /* clear all */ - mtdcr( uic1er, 0x00000000 ); /* disable all */ - mtdcr( uic1cr, 0x00000000 ); /* all non-critical */ - mtdcr( uic1pr, 0xffffe0ff ); /* per ref-board manual */ - mtdcr( uic1tr, 0x00ffc000 ); /* per ref-board manual */ - mtdcr( uic1vr, 0x00000001 ); /* int31 highest, base=0x000 */ - mtdcr( uic1sr, 0xffffffff ); /* clear all */ - - return 0; -} - - -int checkboard (void) -{ - sys_info_t sysinfo; - get_sys_info(&sysinfo); - - printf("Board: esd CPCI-440\n"); - printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz/1000000); - printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor/1000000); - printf("\tPLB: %lu MHz\n", sysinfo.freqPLB/1000000); - printf("\tOPB: %lu MHz\n", sysinfo.freqOPB/1000000); - printf("\tEBC: %lu MHz\n", sysinfo.freqEBC/1000000); - - /* - * Disable sleep mode in LXT971 - */ - lxt971_no_sleep(); - - return (0); -} - - -long int initdram (int board_type) -{ - long dram_size = 0; - - dram_size = fixed_sdram(); - return dram_size; -} - - -/************************************************************************* - * fixed sdram init -- doesn't use serial presence detect. - * - * Assumes: 64 MB, non-ECC, non-registered - * PLB @ 133 MHz - * - ************************************************************************/ -long int fixed_sdram( void ) -{ - uint reg; - -#if 1 /* test-only */ - /*-------------------------------------------------------------------- - * Setup some default - *------------------------------------------------------------------*/ - mtsdram( mem_uabba, 0x00000000 ); /* ubba=0 (default) */ - mtsdram( mem_slio, 0x00000000 ); /* rdre=0 wrre=0 rarw=0 */ - mtsdram( mem_devopt,0x00000000 ); /* dll=0 ds=0 (normal) */ - mtsdram( mem_wddctr,0x40000000 ); /* wrcp=0 dcd=0 */ - mtsdram( mem_clktr, 0x40000000 ); /* clkp=1 (90 deg wr) dcdt=0 */ - - /*-------------------------------------------------------------------- - * Setup for board-specific specific mem - *------------------------------------------------------------------*/ - /* - * Following for CAS Latency = 2.5 @ 133 MHz PLB - */ - mtsdram( mem_b0cr, 0x00082001 );/* SDBA=0x000, 64MB, Mode 2, enabled*/ - mtsdram( mem_tr0, 0x410a4012 );/* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */ - /* RA=10 RD=3 */ - mtsdram( mem_tr1, 0x8080082f );/* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */ - mtsdram( mem_rtr, 0x08200000 );/* Rate 15.625 ns @ 133 MHz PLB */ - mtsdram( mem_cfg1, 0x00000000 );/* Self-refresh exit, disable PM */ - udelay( 400 ); /* Delay 200 usecs (min) */ - - /*-------------------------------------------------------------------- - * Enable the controller, then wait for DCEN to complete - *------------------------------------------------------------------*/ - mtsdram( mem_cfg0, 0x86000000 );/* DCEN=1, PMUD=1, 64-bit */ - for(;;) - { - mfsdram( mem_mcsts, reg ); - if( reg & 0x80000000 ) - break; - } - - return( 64 * 1024 * 1024 ); /* 64 MB */ -#else - return( 32 * 1024 * 1024 ); /* 64 MB */ -#endif -} -- cgit