From e02aea61cb17fc1e39368e4911491305d805e886 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 9 Feb 2011 02:00:08 +0000 Subject: powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code) The P3041DS & P5020DS boards are almost identical (except for the processor in them). Additionally they are based on the P4080DS board design so we use the some board code for all 3 boards. Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock configuration. Additionally, the P3041DS/P5020DS support NAND. Signed-off-by: Timur Tabi Signed-off-by: Shaohui Xie Signed-off-by: Kumar Gala --- board/freescale/corenet_ds/law.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'board/freescale/corenet_ds/law.c') diff --git a/board/freescale/corenet_ds/law.c b/board/freescale/corenet_ds/law.c index 43b4b97de1..d2ba556b63 100644 --- a/board/freescale/corenet_ds/law.c +++ b/board/freescale/corenet_ds/law.c @@ -1,5 +1,5 @@ /* - * Copyright 2008-2010 Freescale Semiconductor, Inc. + * Copyright 2008-2011 Freescale Semiconductor, Inc. * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -35,6 +35,9 @@ struct law_entry law_table[] = { #ifdef CONFIG_SYS_DCSRBAR_PHYS SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), #endif +#ifdef CONFIG_SYS_NAND_BASE_PHYS + SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), +#endif }; int num_law_entries = ARRAY_SIZE(law_table); -- cgit