From e02aea61cb17fc1e39368e4911491305d805e886 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 9 Feb 2011 02:00:08 +0000 Subject: powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code) The P3041DS & P5020DS boards are almost identical (except for the processor in them). Additionally they are based on the P4080DS board design so we use the some board code for all 3 boards. Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock configuration. Additionally, the P3041DS/P5020DS support NAND. Signed-off-by: Timur Tabi Signed-off-by: Shaohui Xie Signed-off-by: Kumar Gala --- board/freescale/corenet_ds/p5020ds_ddr.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 board/freescale/corenet_ds/p5020ds_ddr.c (limited to 'board/freescale/corenet_ds/p5020ds_ddr.c') diff --git a/board/freescale/corenet_ds/p5020ds_ddr.c b/board/freescale/corenet_ds/p5020ds_ddr.c new file mode 100644 index 0000000000..e65de364d7 --- /dev/null +++ b/board/freescale/corenet_ds/p5020ds_ddr.c @@ -0,0 +1,18 @@ +/* + * Copyright 2009-2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include +#include + +fixed_ddr_parm_t fixed_ddr_parm_0[] = { + {0, 0, NULL} +}; + +fixed_ddr_parm_t fixed_ddr_parm_1[] = { + {0, 0, NULL} +}; -- cgit