From f668c52033548ad1d6430ebd29cdda713819415f Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Tue, 16 Oct 2018 16:19:22 +0800 Subject: arm: ls1021a: Add timer_init() in board_init_f for SPL I2C is used to access DDR SPD in the DDR initialization for SPL. In i2c_write process, get_timer() will be called. In board_init_f for SPL, timer_init() is not called before. The system counter is not enabled and the counter frequency is not set to 12.5MHz in SPL. The parameters for do_div() are zero too. It could not be found until CONFIG_USE_PRIVATE_LIBGCC is enabled in default. When CONFIG_USE_PRIVATE_LIBGCC is enabled, U-Boot will use its own set of libgcc functions. As the parameters for do_div() are zero, __div0 will be called. Then the processor will stay in an endless loop after calling hang(). This patch will add timer_init() in board_init_f for SPL and fix a series of issues it caused. Signed-off-by: Alison Wang Reviewed-by: York Sun --- board/freescale/ls1021atwr/ls1021atwr.c | 1 + 1 file changed, 1 insertion(+) (limited to 'board/freescale/ls1021atwr') diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index dcd6d933ea..beb82cebb6 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -467,6 +467,7 @@ void board_init_f(ulong dummy) preloader_console_init(); + timer_init(); dram_init(); /* Allow OCRAM access permission as R/W */ -- cgit