From 3c1d218a1d3048fb576677c47eab43049d0b7778 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 4 Apr 2016 11:41:26 -0700 Subject: armv8: LS2080A: Consolidate LS2080A and LS2085A LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun CC: Prabhakar Kushwaha Reviewed-by: Prabhakar Kushwaha --- board/freescale/ls2080ardb/ls2080ardb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board/freescale/ls2080ardb/ls2080ardb.c') diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 8201048193..fb39af6445 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -207,7 +207,7 @@ void detail_board_ddr_info(void) print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); print_ddr_info(0); #ifdef CONFIG_SYS_FSL_HAS_DP_DDR - if (gd->bd->bi_dram[2].size) { + if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { puts("\nDP-DDR "); print_size(gd->bd->bi_dram[2].size, ""); print_ddr_info(CONFIG_DP_DDR_CTRL); -- cgit