From 9dde167edb16a0d3c8e0db4c872e82dc41f24234 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:47 -0800
Subject: imx: ventana: mv88e61xx change LED configuration

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index c4ec97435f..27a3911acd 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -267,11 +267,11 @@ int mv88e61xx_hw_reset(struct phy_device *phydev)
 	phydev->speed = SPEED_1000;
 	phydev->duplex = DUPLEX_FULL;
 
-	/* LED configuration: 7:4-green (8=Activity)  3:0 amber (9=10Link) */
-	bus->write(bus, 0x10, 0, 0x16, 0x8089);
-	bus->write(bus, 0x11, 0, 0x16, 0x8089);
-	bus->write(bus, 0x12, 0, 0x16, 0x8089);
-	bus->write(bus, 0x13, 0, 0x16, 0x8089);
+	/* LED configuration: 7:4-green (8=Activity)  3:0 amber (8=Link) */
+	bus->write(bus, 0x10, 0, 0x16, 0x8088);
+	bus->write(bus, 0x11, 0, 0x16, 0x8088);
+	bus->write(bus, 0x12, 0, 0x16, 0x8088);
+	bus->write(bus, 0x13, 0, 0x16, 0x8088);
 
 	return 0;
 }
-- 
cgit 


From ff3568fcfe22504cbf61711350c49876a7b5dd7c Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:48 -0800
Subject: imx: ventana: do not iomux UART1

The only UART that is garunteed on Ventana boards is UART2 (serial-console).

Remove UART1 pinmux as that it is not consistent across all Ventana boards
and U-Boot doesn't need it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c | 7 -------
 1 file changed, 7 deletions(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 41fe8dc240..f577bdbdfb 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -18,12 +18,6 @@
 
 #include "common.h"
 
-/* UART1: Function varies per baseboard */
-static iomux_v3_cfg_t const uart1_pads[] = {
-	IOMUX_PADS(PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
 /* UART2: Serial Console */
 static iomux_v3_cfg_t const uart2_pads[] = {
 	IOMUX_PADS(PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
@@ -32,7 +26,6 @@ static iomux_v3_cfg_t const uart2_pads[] = {
 
 void setup_iomux_uart(void)
 {
-	SETUP_IOMUX_PADS(uart1_pads);
 	SETUP_IOMUX_PADS(uart2_pads);
 }
 
-- 
cgit 


From 3f0da8748ad777ea2d26f86a041872e5f8c4c4da Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:49 -0800
Subject: imx: ventana: remove setup of I2C3 from SPL

Do not setup I2C3 in the SPL for Ventana as some devices on that bus
(aic3x codecs) can hang the bus causing i2c_setup to spin endlessly until
they are put into reset. Removing the setup of I2C3 from the SPL allows
the board-specific GPIO to be configured to take care of putting codecs
in reset prior to U-Boot setting up I2C3.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 165 ++++++++++++++--------------
 board/gateworks/gw_ventana/common.h         |   2 +-
 board/gateworks/gw_ventana/gw_ventana.c     |   4 +-
 board/gateworks/gw_ventana/gw_ventana_spl.c |   5 +-
 4 files changed, 90 insertions(+), 86 deletions(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index f577bdbdfb..676a1a8f42 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -78,95 +78,96 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
 
-/* I2C1: GSC */
-static struct i2c_pads_info mx6q_i2c_pad_info0 = {
-	.scl = {
-		.i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
-		.gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
-		.gp = IMX_GPIO_NR(3, 21)
-	},
-	.sda = {
-		.i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
-		.gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
-		.gp = IMX_GPIO_NR(3, 28)
-	}
-};
-static struct i2c_pads_info mx6dl_i2c_pad_info0 = {
-	.scl = {
-		.i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
-		.gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
-		.gp = IMX_GPIO_NR(3, 21)
-	},
-	.sda = {
-		.i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
-		.gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
-		.gp = IMX_GPIO_NR(3, 28)
-	}
-};
-
-/* I2C2: PMIC/PCIe Switch/PCIe Clock/Mezz */
-static struct i2c_pads_info mx6q_i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
-		.gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
-		.gp = IMX_GPIO_NR(4, 12)
-	},
-	.sda = {
-		.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
-		.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-		.gp = IMX_GPIO_NR(4, 13)
-	}
-};
-static struct i2c_pads_info mx6dl_i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
-		.gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
-		.gp = IMX_GPIO_NR(4, 12)
-	},
-	.sda = {
-		.i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
-		.gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-		.gp = IMX_GPIO_NR(4, 13)
+/*
+ * I2C pad configs:
+ * I2C1: GSC
+ * I2C2: PMIC,PCIe Switch,Clock,Mezz
+ * I2C3: Multimedia/Expansion
+ */
+static struct i2c_pads_info mx6q_i2c_pad_info[] = {
+	{
+		.scl = {
+			.i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
+			.gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
+			.gp = IMX_GPIO_NR(3, 21)
+		},
+		.sda = {
+			.i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
+			.gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
+			.gp = IMX_GPIO_NR(3, 28)
+		}
+	}, {
+		.scl = {
+			.i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
+			.gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
+			.gp = IMX_GPIO_NR(4, 12)
+		},
+		.sda = {
+			.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
+			.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
+			.gp = IMX_GPIO_NR(4, 13)
+		}
+	}, {
+		.scl = {
+			.i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
+			.gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
+			.gp = IMX_GPIO_NR(1, 3)
+		},
+		.sda = {
+			.i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
+			.gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC,
+			.gp = IMX_GPIO_NR(1, 6)
+		}
 	}
 };
 
-/* I2C3: Misc/Expansion */
-static struct i2c_pads_info mx6q_i2c_pad_info2 = {
-	.scl = {
-		.i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
-		.gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
-		.gp = IMX_GPIO_NR(1, 3)
-	},
-	.sda = {
-		.i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC,
-		.gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC,
-		.gp = IMX_GPIO_NR(1, 6)
-	}
-};
-static struct i2c_pads_info mx6dl_i2c_pad_info2 = {
-	.scl = {
-		.i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
-		.gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC,
-		.gp = IMX_GPIO_NR(1, 3)
-	},
-	.sda = {
-		.i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC,
-		.gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC,
-		.gp = IMX_GPIO_NR(1, 6)
+static struct i2c_pads_info mx6dl_i2c_pad_info[] = {
+	{
+		.scl = {
+			.i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
+			.gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
+			.gp = IMX_GPIO_NR(3, 21)
+		},
+		.sda = {
+			.i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
+			.gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
+			.gp = IMX_GPIO_NR(3, 28)
+		}
+	}, {
+		.scl = {
+			.i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
+			.gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
+			.gp = IMX_GPIO_NR(4, 12)
+		},
+		.sda = {
+			.i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
+			.gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
+			.gp = IMX_GPIO_NR(4, 13)
+		}
+	}, {
+		.scl = {
+			.i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
+			.gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC,
+			.gp = IMX_GPIO_NR(1, 3)
+		},
+		.sda = {
+			.i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC,
+			.gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC,
+			.gp = IMX_GPIO_NR(1, 6)
+		}
 	}
 };
 
-void setup_ventana_i2c(void)
+void setup_ventana_i2c(int i2c)
 {
-	if (is_cpu_type(MXC_CPU_MX6Q)) {
-		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info0);
-		setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1);
-		setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info2);
-	} else {
-		setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info0);
-		setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1);
-		setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info2);
-	}
+	struct i2c_pads_info *p;
+
+	if (is_cpu_type(MXC_CPU_MX6Q))
+		p = &mx6q_i2c_pad_info[i2c];
+	else
+		p = &mx6dl_i2c_pad_info[i2c];
+
+	setup_i2c(i2c, CONFIG_SYS_I2C_SPEED, 0x7f, p);
 }
 
 /*
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 8019e27f6e..027e972280 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -85,7 +85,7 @@ struct ventana {
 extern struct ventana gpio_cfg[GW_UNKNOWN];
 
 /* configure i2c iomux */
-void setup_ventana_i2c(void);
+void setup_ventana_i2c(int);
 /* configure uart iomux */
 void setup_iomux_uart(void);
 /* conifgure PMIC */
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 27a3911acd..c0b0cc9bb9 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -631,7 +631,9 @@ int board_init(void)
 #ifdef CONFIG_MXC_SPI
 	setup_spi();
 #endif
-	setup_ventana_i2c();
+	setup_ventana_i2c(0);
+	setup_ventana_i2c(1);
+	setup_ventana_i2c(2);
 
 #ifdef CONFIG_SATA
 	setup_sata();
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index a6ac546e95..80ade9f437 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -599,9 +599,10 @@ void board_init_f(ulong dummy)
 	/* setup AXI */
 	gpr_init();
 
-	/* iomux and setup of i2c */
+	/* iomux and setup of uart/i2c */
 	setup_iomux_uart();
-	setup_ventana_i2c();
+	setup_ventana_i2c(0);
+	setup_ventana_i2c(1);
 
 	/* setup GP timer */
 	timer_init();
-- 
cgit 


From d1c3867a08de98e23c375c76076ab301d9783596 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:50 -0800
Subject: imx: ventana: add support for GW5905

The GW5905 is single-board tablet computer based on the i.MX6 SoC with the
following peripheral set:
 - eMMC flash (boot device)
 - microSD expansion
 - LVDS display connector for off-board 3D+1C with PWM backlight
   and I2C based touch controller
 - MIPI camera connector supporting the TRULY CM8487-B500SA-E (OV5640)
 - ublox EMMY-W1 WiFi/Bluetooth/NFC module (SDIO/UART)
 - ublox ZOE-M8Q GPS
 - LSM9DS1 9-DOF IMU
 - 1x 1-lane miniPCIe socket with USB 2.0
 - Gateworks System Controller
 - Audio jack with TLV320AIC Audio Codec, Speaker AMP
   and TSA227E Headphone detect
 - MAX8607 3-mode LED camera flash
 - DECT ULE module
 - FUSB302 USB-C PD and ISL9238 Battery charger

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 97 ++++++++++++++++++++++++++++-
 board/gateworks/gw_ventana/eeprom.c         |  4 +-
 board/gateworks/gw_ventana/gsc.c            |  6 +-
 board/gateworks/gw_ventana/gsc.h            |  3 +-
 board/gateworks/gw_ventana/gw_ventana.c     |  2 +-
 board/gateworks/gw_ventana/gw_ventana_spl.c | 48 +++++++++++---
 board/gateworks/gw_ventana/ventana_eeprom.h |  1 +
 7 files changed, 149 insertions(+), 12 deletions(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 676a1a8f42..b962b4b29d 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -457,6 +457,47 @@ static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
 	IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw5905_gpio_pads[] = {
+	/* EMMY_PDN# */
+	IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
+	/* MIPI_RST */
+	IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 | DIO_PAD_CFG),
+	/* MIPI_PWDN */
+	IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
+	/* USBEHCI_SEL */
+	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_GPIO_16__GPIO7_IO11 | DIO_PAD_CFG),
+	/* LVDS_BKLEN # */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_18__GPIO7_IO13 | DIO_PAD_CFG),
+	/* SPK_SHDN# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* LOCLED# */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
+	/* FLASH LED1 */
+	IOMUX_PADS(PAD_DISP0_DAT11__GPIO5_IO05 | DIO_PAD_CFG),
+	/* FLASH LED2 */
+	IOMUX_PADS(PAD_DISP0_DAT12__GPIO5_IO06 | DIO_PAD_CFG),
+	/* DECT_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT20__GPIO5_IO14 | DIO_PAD_CFG),
+	/* USBH1_PEN (EHCI) */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* LVDS_PWM */
+	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+	/* CODEC_RST */
+	IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
+	/* GYRO_CONTROL/DATA_EN */
+	IOMUX_PADS(PAD_CSI0_DAT8__GPIO5_IO26 | DIO_PAD_CFG),
+	/* TOUCH_RST */
+	IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
+	/* TOUCH_IRQ */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+};
+
 /* Digital I/O */
 struct dio_cfg gw51xx_dio[] = {
 	{
@@ -993,8 +1034,25 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.mezz_irq = IMX_GPIO_NR(2, 18),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
+
+	/* GW5905 */
+	{
+		.gpio_pads = gw5905_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5905_gpio_pads)/2,
+		.leds = {
+			IMX_GPIO_NR(6, 14),
+		},
+		.pcie_rst = IMX_GPIO_NR(7, 11),
+		.wdis = IMX_GPIO_NR(7, 13),
+	},
 };
 
+#define SETUP_GPIO_OUTPUT(gpio, name, level) \
+	gpio_request(gpio, name); \
+	gpio_direction_output(gpio, level);
+#define SETUP_GPIO_INPUT(gpio, name) \
+	gpio_request(gpio, name); \
+	gpio_direction_input(gpio);
 void setup_iomux_gpio(int board, struct ventana_board_info *info)
 {
 	int i;
@@ -1143,6 +1201,28 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_request(IMX_GPIO_NR(1, 13), "m2_rst#");
 		gpio_direction_output(IMX_GPIO_NR(1, 13), 1);
 		break;
+	case GW5905:
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 7), "usb_pcisel", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 9), "lvds_cabc", 1);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 14), "mipi_pdwn", 1);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 15), "mipi_rst#", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(2, 3), "emmy_pdwn#", 1);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(4, 5), "spk_shdn#", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(4, 8), "touch_rst", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(4, 6), "touch_irq", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(5, 5), "flash_en1", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(5, 6), "flash_en2", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(5, 14), "dect_rst#", 1);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(5, 17), "codec_rst#", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(5, 26), "imu_den", 1);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(7, 12), "lvds_cabc", 0);
+		mdelay(100);
+		/*
+		 * gauruntee touch controller comes out of reset with INT
+		 * low for address
+		 */
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(4, 8), "touch_rst", 1);
+		break;
 	}
 }
 
@@ -1292,7 +1372,7 @@ void setup_pmic(void)
 			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
 			break;
 		case GW5903:
-			/* mask PGOOD during SW1 transition */
+			/* mask PGOOD during SW3 transition */
 			pmic_reg_write(p, LTC3676_DVB3B,
 				       0x1f | LTC3676_PGOOD_MASK);
 			/* set SW3 (VDD_ARM) */
@@ -1304,6 +1384,19 @@ void setup_pmic(void)
 			/* set SW4 (VDD_SOC) */
 			pmic_reg_write(p, LTC3676_DVB4A, 0x1f);
 			break;
+		case GW5905:
+			/* mask PGOOD during SW1 transition */
+			pmic_reg_write(p, LTC3676_DVB1B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW1 (VDD_ARM) */
+			pmic_reg_write(p, LTC3676_DVB1A, 0x1f);
+
+			/* mask PGOOD during SW3 transition */
+			pmic_reg_write(p, LTC3676_DVB3B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW3 (VDD_SOC) */
+			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
+			break;
 		default:
 			/* mask PGOOD during SW1 transition */
 			pmic_reg_write(p, LTC3676_DVB1B,
@@ -1371,6 +1464,7 @@ int board_mmc_init(bd_t *bis)
 		usdhc_cfg[1].max_bus_width = 4;
 		return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
 	case GW5904:
+	case GW5905:
 		/* usdhc3: 8bit eMMC */
 		SETUP_IOMUX_PADS(gw5904_emmc_pads);
 		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
@@ -1399,6 +1493,7 @@ int board_mmc_getcd(struct mmc *mmc)
 		break;
 	case GW5903:
 	case GW5904:
+	case GW5905:
 		/* emmc is always present */
 		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
 			return 1;
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index f0ae820988..13ccf2b059 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -99,8 +99,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
 	case '9':
 		if (info->model[4] == '0' && info->model[5] == '3')
 			type = GW5903;
-		if (info->model[4] == '0' && info->model[5] == '4')
+		else if (info->model[4] == '0' && info->model[5] == '4')
 			type = GW5904;
+		else if (info->model[4] == '0' && info->model[5] == '5')
+			type = GW5905;
 		break;
 	}
 	return type;
diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index c31ef117b2..068f8cd9e7 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -70,7 +70,7 @@ static void read_hwmon(const char *name, uint reg, uint size)
 		puts("fRD\n");
 	} else {
 		ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
-		if (reg == GSC_HWMON_TEMP && ui > 0x8000)
+		if (size == 2 && ui > 0x8000)
 			ui -= 0xffff;
 		if (ui == 0xffffff)
 			puts("invalid\n");
@@ -140,6 +140,10 @@ int gsc_info(int verbose)
 		read_hwmon("VDD_IO4",  GSC_HWMON_VDD_IO4, 3);
 		read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
 		break;
+	case '9': /* GW590x */
+		read_hwmon("AMONBMON",  GSC_HWMON_VDD_IO3, 3);
+		read_hwmon("BAT_VOLT",  GSC_HWMON_VDD_EXT, 3);
+		read_hwmon("BAT_TEMP",  GSC_HWMON_VDD_IO4, 2);
 	}
 	return 0;
 }
diff --git a/board/gateworks/gw_ventana/gsc.h b/board/gateworks/gw_ventana/gsc.h
index 0cce9b1b3a..6dcaafadf3 100644
--- a/board/gateworks/gw_ventana/gsc.h
+++ b/board/gateworks/gw_ventana/gsc.h
@@ -48,9 +48,10 @@ enum {
 	GSC_HWMON_VBATT		= 0x08,
 	GSC_HWMON_VDD_5P0	= 0x0b,
 	GSC_HWMON_VDD_CORE	= 0x0e,
+	GSC_HWMON_VDD_SOC	= 0x11,
 	GSC_HWMON_VDD_HIGH	= 0x14,
 	GSC_HWMON_VDD_DDR	= 0x17,
-	GSC_HWMON_VDD_SOC	= 0x11,
+	GSC_HWMON_VDD_EXT	= 0x1a,
 	GSC_HWMON_VDD_1P8	= 0x1d,
 	GSC_HWMON_VDD_IO2	= 0x20,
 	GSC_HWMON_VDD_2P5	= 0x23,
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index c0b0cc9bb9..e1ad0fc9a0 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -709,7 +709,7 @@ static const struct boot_mode board_boot_modes[] = {
 	/* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
 	{ "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
 	{ "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
-	{ "emmc3", MAKE_CFGVAL(0x60, 0x50, 0x00, 0x00) }, /* GW5903/GW5904 */
+	{ "emmc3", MAKE_CFGVAL(0x60, 0x50, 0x00, 0x00) }, /* GW5903/4/5 */
 	{ NULL, 0 },
 };
 #endif
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 80ade9f437..280493dd46 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -390,6 +390,25 @@ static struct mx6_mmdc_calibration mx6sdl_256x64x2_mmdc_calib = {
 	.p1_mpwrdlctl   = 0x3F36363F,
 };
 
+static struct mx6_mmdc_calibration mx6sdl_128x64x2_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x001F003F,
+	.p0_mpwldectrl1 = 0x001F001F,
+	.p1_mpwldectrl0 = 0x001F004E,
+	.p1_mpwldectrl1 = 0x0059001F,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0   = 0x42220225,
+	.p0_mpdgctrl1   = 0x0213021F,
+	.p1_mpdgctrl0   = 0x022C0242,
+	.p1_mpdgctrl1   = 0x022C0244,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl   = 0x474A4C4A,
+	.p1_mprddlctl   = 0x48494C45,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl   = 0x3F3F3F36,
+	.p1_mpwrdlctl   = 0x3F36363F,
+};
+
 static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
 	/* write leveling calibration determine */
 	.p0_mpwldectrl0 = 0x002A0025,
@@ -519,18 +538,33 @@ static void spl_dram_init(int width, int size_mb, int board_model)
 			calib = &mx6sdl_128x64_mmdc_calib;
 		debug("2gB density\n");
 	} else if (width == 64 && size_mb == 2048) {
-		mem = &mt41k256m16ha_125;
-		if (is_cpu_type(MXC_CPU_MX6Q))
-			calib = &mx6dq_256x64_mmdc_calib;
-		else
-			calib = &mx6sdl_256x64_mmdc_calib;
-		debug("4gB density\n");
+		switch(board_model) {
+		case GW5905:
+			/* 8xMT41K128M16 (2GiB) fly-by mirrored 2-chipsels */
+			mem = &mt41k128m16jt_125;
+			debug("2gB density - 2 chipsel\n");
+			if (!is_cpu_type(MXC_CPU_MX6Q)) {
+				calib = &mx6sdl_128x64x2_mmdc_calib;
+				sysinfo.ncs = 2;
+				sysinfo.cs_density = 10; /* CS0_END=39 */
+				sysinfo.cs1_mirror = 1; /* mirror enabled */
+			}
+			break;
+		default:
+			mem = &mt41k256m16ha_125;
+			if (is_cpu_type(MXC_CPU_MX6Q))
+				calib = &mx6dq_256x64_mmdc_calib;
+			else
+				calib = &mx6sdl_256x64_mmdc_calib;
+			debug("4gB density\n");
+			break;
+		}
 	} else if (width == 64 && size_mb == 4096) {
 		switch(board_model) {
 		case GW5903:
 			/* 8xMT41K256M16 (4GiB) fly-by mirrored 2-chipsels */
 			mem = &mt41k256m16ha_125;
-			debug("4gB density\n");
+			debug("4gB density - 2 chipsel\n");
 			if (!is_cpu_type(MXC_CPU_MX6Q)) {
 				calib = &mx6sdl_256x64x2_mmdc_calib;
 				sysinfo.ncs = 2;
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index d2a16f1a00..f2d87373ec 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -114,6 +114,7 @@ enum {
 	GW560x,
 	GW5903,
 	GW5904,
+	GW5905,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
-- 
cgit 


From b81c07bcc372fd6baeaf672660028d95439f329d Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:51 -0800
Subject: imx: ventana: add support for Z101WX01 LVDS display

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index e1ad0fc9a0..adccad8032 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -424,7 +424,29 @@ struct display_info_t const displays[] = {{
 		.vsync_len      = 10,
 		.sync           = FB_SYNC_EXT,
 		.vmode          = FB_VMODE_NONINTERLACED
-} } };
+} }, {
+	.bus	= 2,
+	.addr	= 0x5d,
+	.detect	= detect_i2c,
+	.enable	= enable_lvds,
+	.pixfmt	= IPU_PIX_FMT_LVDS666,
+	.mode	= {
+		.name           = "Z101WX01",
+		.refresh        = 60,
+		.xres           = 1280,
+		.yres           = 800,
+		.pixclock       = 15385,	/* 64MHz */
+		.left_margin    = 220,
+		.right_margin   = 40,
+		.upper_margin   = 21,
+		.lower_margin   = 7,
+		.hsync_len      = 60,
+		.vsync_len      = 10,
+		.sync           = FB_SYNC_EXT,
+		.vmode          = FB_VMODE_NONINTERLACED
+	}
+},
+};
 size_t display_count = ARRAY_SIZE(displays);
 
 static void setup_display(void)
-- 
cgit 


From fd10b3b176ee8b6ddcc45cd00f6be143c6c1bcf6 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:52 -0800
Subject: imx: ventana: skip nand init for nandless boards

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c     |  7 +++++++
 board/gateworks/gw_ventana/common.h     |  1 +
 board/gateworks/gw_ventana/gw_ventana.c | 10 ++++++----
 3 files changed, 14 insertions(+), 4 deletions(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index b962b4b29d..f54eab576c 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -859,6 +859,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.vidin_en = IMX_GPIO_NR(5, 20),
 		.wdis = IMX_GPIO_NR(7, 12),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.nand = true,
 	},
 
 	/* GW52xx */
@@ -884,6 +885,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
 		.mmc_cd = IMX_GPIO_NR(7, 0),
+		.nand = true,
 	},
 
 	/* GW53xx */
@@ -908,6 +910,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
 		.mmc_cd = IMX_GPIO_NR(7, 0),
+		.nand = true,
 	},
 
 	/* GW54xx */
@@ -934,6 +937,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
 		.mmc_cd = IMX_GPIO_NR(7, 0),
+		.nand = true,
 	},
 
 	/* GW551x */
@@ -947,6 +951,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		},
 		.pcie_rst = IMX_GPIO_NR(1, 0),
 		.wdis = IMX_GPIO_NR(7, 12),
+		.nand = true,
 	},
 
 	/* GW552x */
@@ -964,6 +969,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.usb_sel = IMX_GPIO_NR(1, 7),
 		.wdis = IMX_GPIO_NR(7, 12),
 		.msata_en = GP_MSATA_SEL,
+		.nand = true,
 	},
 
 	/* GW553x */
@@ -982,6 +988,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
 		.mmc_cd = IMX_GPIO_NR(7, 0),
+		.nand = true,
 	},
 
 	/* GW560x */
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 027e972280..5cec01c838 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -80,6 +80,7 @@ struct ventana {
 	int mmc_cd;
 	/* various features */
 	bool usd_vsel;
+	bool nand;
 };
 
 extern struct ventana gpio_cfg[GW_UNKNOWN];
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index adccad8032..c4a16fff31 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -647,21 +647,23 @@ int board_init(void)
 	/* address of linux boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+	/* read Gateworks EEPROM into global struct (used later) */
+	setup_ventana_i2c(0);
+	board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+
 #ifdef CONFIG_CMD_NAND
-	setup_gpmi_nand();
+	if (gpio_cfg[board_type].nand)
+		setup_gpmi_nand();
 #endif
 #ifdef CONFIG_MXC_SPI
 	setup_spi();
 #endif
-	setup_ventana_i2c(0);
 	setup_ventana_i2c(1);
 	setup_ventana_i2c(2);
 
 #ifdef CONFIG_SATA
 	setup_sata();
 #endif
-	/* read Gateworks EEPROM into global struct (used later) */
-	board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 
 	setup_iomux_gpio(board_type, &ventana_info);
 
-- 
cgit 


From 64bdd120a00d44de2e65294774a5bae06c783f8c Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:53 -0800
Subject: imx: ventana: add i2c detect for all LVDS displays

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index c4a16fff31..fb81a96e77 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -384,8 +384,8 @@ struct display_info_t const displays[] = {{
 		.vmode          = FB_VMODE_NONINTERLACED
 } }, {
 	/* DLC700JMG-T-4 */
-	.bus	= 0,
-	.addr	= 0,
+	.bus	= 2,
+	.addr	= 0x38,
 	.detect	= NULL,
 	.enable	= enable_lvds,
 	.pixfmt	= IPU_PIX_FMT_LVDS666,
@@ -405,8 +405,8 @@ struct display_info_t const displays[] = {{
 		.vmode          = FB_VMODE_NONINTERLACED
 } }, {
 	/* DLC800FIG-T-3 */
-	.bus	= 0,
-	.addr	= 0,
+	.bus	= 2,
+	.addr	= 0x14,
 	.detect	= NULL,
 	.enable	= enable_lvds,
 	.pixfmt	= IPU_PIX_FMT_LVDS666,
-- 
cgit 


From 988916ad1bf1e9fc98c848088d364dd8c3827f03 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:54 -0800
Subject: imx: ventana: add support for GW5906

The GW5906 is a GW552x with mechanical and power supply connector
differences.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 45 +++++++++++++++++++++++++++++
 board/gateworks/gw_ventana/eeprom.c         |  2 ++
 board/gateworks/gw_ventana/gw_ventana.c     |  1 +
 board/gateworks/gw_ventana/ventana_eeprom.h |  1 +
 4 files changed, 49 insertions(+)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index f54eab576c..3a187eaf8d 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -817,6 +817,33 @@ struct dio_cfg gw5904_dio[] = {
 	},
 };
 
+struct dio_cfg gw5906_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+		IMX_GPIO_NR(1, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+		IMX_GPIO_NR(1, 19),
+		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+		2
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+		IMX_GPIO_NR(1, 17),
+		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+		3
+	},
+	{
+		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+		IMX_GPIO_NR(1, 20),
+		{ 0, 0 },
+		0
+	},
+};
+
 /*
  * Board Specific GPIO
  */
@@ -1052,6 +1079,24 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.pcie_rst = IMX_GPIO_NR(7, 11),
 		.wdis = IMX_GPIO_NR(7, 13),
 	},
+
+	/* GW5906 */
+	{
+		.gpio_pads = gw552x_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw552x_gpio_pads)/2,
+		.dio_cfg = gw5906_dio,
+		.dio_num = ARRAY_SIZE(gw5906_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.usb_sel = IMX_GPIO_NR(1, 7),
+		.wdis = IMX_GPIO_NR(7, 12),
+		.msata_en = GP_MSATA_SEL,
+		.nand = true,
+	},
 };
 
 #define SETUP_GPIO_OUTPUT(gpio, name, level) \
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 13ccf2b059..e697b8ca09 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -103,6 +103,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW5904;
 		else if (info->model[4] == '0' && info->model[5] == '5')
 			type = GW5905;
+		else if (info->model[4] == '0' && info->model[5] == '6')
+			type = GW5906;
 		break;
 	}
 	return type;
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index fb81a96e77..da9f5d89be 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -155,6 +155,7 @@ int board_ehci_hcd_init(int port)
 	switch (board_type) {
 	case GW53xx:
 	case GW552x:
+	case GW5906:
 		gpio = (IMX_GPIO_NR(1, 9));
 		break;
 	case GW54proto:
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index f2d87373ec..80a702389c 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -115,6 +115,7 @@ enum {
 	GW5903,
 	GW5904,
 	GW5905,
+	GW5906,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
-- 
cgit 


From 00606b51cca6057b4df2b52c3572f476307257eb Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:55 -0800
Subject: imx: ventana: add support for GW5907

The GW5907 is a small single board computer based on the i.MX6DL SoC
with the following peripheral set:
 - DDR3 memory (512MB default)
 - 1x GigE (i.MX6 FEC)
 - Gateworks System Controller

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 15 +++++++++++++++
 board/gateworks/gw_ventana/eeprom.c         |  2 ++
 board/gateworks/gw_ventana/ventana_eeprom.h |  1 +
 3 files changed, 18 insertions(+)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 3a187eaf8d..2b0bf0e7cc 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -1097,6 +1097,21 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.msata_en = GP_MSATA_SEL,
 		.nand = true,
 	},
+
+	/* GW5907 */
+	{
+		.gpio_pads = gw51xx_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw51xx_gpio_pads)/2,
+		.dio_cfg = gw51xx_dio,
+		.dio_num = ARRAY_SIZE(gw51xx_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 10),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.wdis = IMX_GPIO_NR(7, 12),
+		.nand = true,
+	},
 };
 
 #define SETUP_GPIO_OUTPUT(gpio, name, level) \
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index e697b8ca09..3aaf195b65 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -105,6 +105,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW5905;
 		else if (info->model[4] == '0' && info->model[5] == '6')
 			type = GW5906;
+		else if (info->model[4] == '0' && info->model[5] == '7')
+			type = GW5907;
 		break;
 	}
 	return type;
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index 80a702389c..c6a38f1218 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -116,6 +116,7 @@ enum {
 	GW5904,
 	GW5905,
 	GW5906,
+	GW5907,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
-- 
cgit 


From ebe07ef754937ea57c828fea32b1b42b9e797882 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:56 -0800
Subject: imx: ventana: add support for GW5908

The GW5908 is a small single board computer based on the i.MX6DL SoC
with the same peripheral set as the GW530x but with 1GiB density DRAM
(64bit 512MiB).

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 21 ++++++++++++++
 board/gateworks/gw_ventana/eeprom.c         |  2 ++
 board/gateworks/gw_ventana/gw_ventana_spl.c | 44 +++++++++++++++++++++++++++++
 board/gateworks/gw_ventana/ventana_eeprom.h |  1 +
 4 files changed, 68 insertions(+)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 2b0bf0e7cc..568dc920ae 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -1112,6 +1112,27 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.wdis = IMX_GPIO_NR(7, 12),
 		.nand = true,
 	},
+
+	/* GW5908 */
+	{
+		.gpio_pads = gw53xx_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw53xx_gpio_pads)/2,
+		.dio_cfg = gw53xx_dio,
+		.dio_num = ARRAY_SIZE(gw53xx_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.gps_shdn = IMX_GPIO_NR(1, 27),
+		.vidin_en = IMX_GPIO_NR(3, 31),
+		.wdis = IMX_GPIO_NR(7, 12),
+		.msata_en = GP_MSATA_SEL,
+		.rs232_en = GP_RS232_EN,
+	},
 };
 
 #define SETUP_GPIO_OUTPUT(gpio, name, level) \
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 3aaf195b65..85802141dd 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -107,6 +107,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW5906;
 		else if (info->model[4] == '0' && info->model[5] == '7')
 			type = GW5907;
+		else if (info->model[4] == '0' && info->model[5] == '8')
+			type = GW5908;
 		break;
 	}
 	return type;
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 280493dd46..27f3774140 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -217,6 +217,46 @@ static struct mx6_mmdc_calibration mx6sdl_64x16_mmdc_calib = {
 	.p0_mpwrdlctl = 0x33382C31,
 };
 
+/* TODO: update with calibrated values */
+static struct mx6_mmdc_calibration mx6dq_64x64_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x00190017,
+	.p0_mpwldectrl1 = 0x00140026,
+	.p1_mpwldectrl0 = 0x0021001C,
+	.p1_mpwldectrl1 = 0x0011001D,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0 = 0x43380347,
+	.p0_mpdgctrl1 = 0x433C034D,
+	.p1_mpdgctrl0 = 0x032C0324,
+	.p1_mpdgctrl1 = 0x03310232,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl = 0x3C313539,
+	.p1_mprddlctl = 0x37343141,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl = 0x36393C39,
+	.p1_mpwrdlctl = 0x42344438,
+};
+
+/* TODO: update with calibrated values */
+static struct mx6_mmdc_calibration mx6sdl_64x64_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x003C003C,
+	.p0_mpwldectrl1 = 0x001F002A,
+	.p1_mpwldectrl0 = 0x00330038,
+	.p1_mpwldectrl1 = 0x0022003F,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0 = 0x42410244,
+	.p0_mpdgctrl1 = 0x4234023A,
+	.p1_mpdgctrl0 = 0x022D022D,
+	.p1_mpdgctrl1 = 0x021C0228,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl = 0x484A4C4B,
+	.p1_mprddlctl = 0x4B4D4E4B,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl = 0x33342B32,
+	.p1_mpwrdlctl = 0x3933332B,
+};
+
 static struct mx6_mmdc_calibration mx6dq_256x16_mmdc_calib = {
 	/* write leveling calibration determine */
 	.p0_mpwldectrl0 = 0x001B0016,
@@ -530,6 +570,10 @@ static void spl_dram_init(int width, int size_mb, int board_model)
 	} else if (width == 64 && size_mb == 512) {
 		mem = &mt41k64m16jt_125;
 		debug("1gB density\n");
+		if (is_cpu_type(MXC_CPU_MX6Q))
+			calib = &mx6dq_64x64_mmdc_calib;
+		else
+			calib = &mx6sdl_64x64_mmdc_calib;
 	} else if (width == 64 && size_mb == 1024) {
 		mem = &mt41k128m16jt_125;
 		if (is_cpu_type(MXC_CPU_MX6Q))
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index c6a38f1218..c80dfa1f7a 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -117,6 +117,7 @@ enum {
 	GW5905,
 	GW5906,
 	GW5907,
+	GW5908,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
-- 
cgit 


From 2285094ea91f361abdfc764826957ec99f1c6f23 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:57 -0800
Subject: imx: ventana: add support for GW5909

The GW5909 is a small single board computer based on the i.MX6DL SoC
with the same peripheral set as the GW5904 but with half the DRAM loaded
and an additional RS232 transceiver off UART2.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 22 ++++++++++++++++++++++
 board/gateworks/gw_ventana/eeprom.c         |  2 ++
 board/gateworks/gw_ventana/ventana_eeprom.h |  1 +
 3 files changed, 25 insertions(+)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 568dc920ae..c1e2e8a506 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -455,6 +455,8 @@ static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
 	IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
 	/* M2_RST# */
 	IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 | DIO_PAD_CFG),
+	/* RS232_EN# */
+	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
 };
 
 static iomux_v3_cfg_t const gw5905_gpio_pads[] = {
@@ -1133,6 +1135,23 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.msata_en = GP_MSATA_SEL,
 		.rs232_en = GP_RS232_EN,
 	},
+
+	/* GW5909 */
+	{
+		.gpio_pads = gw5904_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5904_gpio_pads)/2,
+		.dio_cfg = gw5904_dio,
+		.dio_num = ARRAY_SIZE(gw5904_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
+	},
 };
 
 #define SETUP_GPIO_OUTPUT(gpio, name, level) \
@@ -1275,6 +1294,7 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_request(IMX_GPIO_NR(1, 7) , "bklt_12ven");
 		gpio_direction_output(IMX_GPIO_NR(1, 7), 1);
 		break;
+	case GW5909:
 	case GW5904:
 		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
 		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
@@ -1553,6 +1573,7 @@ int board_mmc_init(bd_t *bis)
 		return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
 	case GW5904:
 	case GW5905:
+	case GW5909:
 		/* usdhc3: 8bit eMMC */
 		SETUP_IOMUX_PADS(gw5904_emmc_pads);
 		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
@@ -1582,6 +1603,7 @@ int board_mmc_getcd(struct mmc *mmc)
 	case GW5903:
 	case GW5904:
 	case GW5905:
+	case GW5909:
 		/* emmc is always present */
 		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
 			return 1;
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 85802141dd..bcd634920c 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -109,6 +109,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW5907;
 		else if (info->model[4] == '0' && info->model[5] == '8')
 			type = GW5908;
+		else if (info->model[4] == '0' && info->model[5] == '9')
+			type = GW5909;
 		break;
 	}
 	return type;
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index c80dfa1f7a..3e24287fe7 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -118,6 +118,7 @@ enum {
 	GW5906,
 	GW5907,
 	GW5908,
+	GW5909,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
-- 
cgit 


From 9cdb1c6e995c53afeb01fdb6d529d60f725fb1f2 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:58 -0800
Subject: imx: ventana: add support for GW5901/GW5902

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 133 ++++++++++++++++++++++++++++
 board/gateworks/gw_ventana/eeprom.c         |   6 +-
 board/gateworks/gw_ventana/gw_ventana.c     |   6 ++
 board/gateworks/gw_ventana/ventana_eeprom.h |   2 +
 4 files changed, 146 insertions(+), 1 deletion(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index c1e2e8a506..8934f213dd 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -389,6 +389,51 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
 	IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw5901_gpio_pads[] = {
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* ETH1_EN */
+	IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | DIO_PAD_CFG),
+	/* CAN_STBY */
+	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG),
+	/* PMIC reset */
+	IOMUX_PADS(PAD_DISP0_DAT8__WDOG1_B | DIO_PAD_CFG),
+	/* COM_CFGA/B/C/D */
+	IOMUX_PADS(PAD_DISP0_DAT20__GPIO5_IO14 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_DISP0_DAT21__GPIO5_IO15 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_DISP0_DAT22__GPIO5_IO16 | DIO_PAD_CFG),
+	IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
+	/* ETI_IRQ# */
+	IOMUX_PADS(PAD_GPIO_5__GPIO1_IO05 | DIO_PAD_CFG),
+	/* DIO_IRQ# */
+	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
+	/* FIBER_SIGDET */
+	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+};
+
+static iomux_v3_cfg_t const gw5902_gpio_pads[] = {
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* CAN1_STBY */
+	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
+	/* CAN2_STBY */
+	IOMUX_PADS(PAD_SD3_CLK__GPIO7_IO03 | DIO_PAD_CFG),
+	/* UART1_EN# */
+	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+	/* 5V_UVLO */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+	/* ETI_IRQ# */
+	IOMUX_PADS(PAD_GPIO_5__GPIO1_IO05 | DIO_PAD_CFG),
+	/* DIO_IRQ# */
+	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
+	/* USBOTG_PEN */
+	IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | DIO_PAD_CFG),
+};
+
 static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
 	/* BKLT_12VEN */
 	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
@@ -741,6 +786,60 @@ struct dio_cfg gw560x_dio[] = {
 	},
 };
 
+struct dio_cfg gw5901_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT20__GPIO5_IO14) },
+		IMX_GPIO_NR(5, 14),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT21__GPIO5_IO15) },
+		IMX_GPIO_NR(5, 15),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT22__GPIO5_IO16) },
+		IMX_GPIO_NR(5, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17) },
+		IMX_GPIO_NR(5, 17),
+		{ 0, 0 },
+		0
+	},
+};
+
+struct dio_cfg gw5902_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT20__GPIO5_IO14) },
+		IMX_GPIO_NR(5, 14),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT21__GPIO5_IO15) },
+		IMX_GPIO_NR(5, 15),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT22__GPIO5_IO16) },
+		IMX_GPIO_NR(5, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17) },
+		IMX_GPIO_NR(5, 17),
+		{ 0, 0 },
+		0
+	},
+};
+
 struct dio_cfg gw5903_dio[] = {
 };
 
@@ -1041,6 +1140,32 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
+	/* GW5901 */
+	{
+		.gpio_pads = gw5901_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5901_gpio_pads)/2,
+		.dio_cfg = gw5901_dio,
+		.leds = {
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 29),
+		.nand = true,
+	},
+
+	/* GW5902 */
+	{
+		.gpio_pads = gw5902_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5902_gpio_pads)/2,
+		.dio_cfg = gw5902_dio,
+		.leds = {
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.rs232_en = GP_RS232_EN,
+		.otgpwr_en = IMX_GPIO_NR(3, 23),
+		.nand = true,
+	},
+
 	/* GW5903 */
 	{
 		.gpio_pads = gw5903_gpio_pads,
@@ -1278,6 +1403,14 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
 		gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
 		break;
+	case GW5901:
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 2), "can_stby", 0);
+		break;
+	case GW5902:
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(1, 2), "can1_stby", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(7, 3), "can2_stby", 0);
+		SETUP_GPIO_OUTPUT(IMX_GPIO_NR(7, 12), "5P0V_EN", 1);
+		break;
 	case GW5903:
 		gpio_request(IMX_GPIO_NR(3, 31) , "usbh1-ehci_pwr");
 		gpio_direction_output(IMX_GPIO_NR(3, 31), 1);
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index bcd634920c..ee227320c0 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -97,7 +97,11 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW560x;
 		break;
 	case '9':
-		if (info->model[4] == '0' && info->model[5] == '3')
+		if (info->model[4] == '0' && info->model[5] == '1')
+			type = GW5901;
+		else if (info->model[4] == '0' && info->model[5] == '2')
+			type = GW5902;
+		else if (info->model[4] == '0' && info->model[5] == '3')
 			type = GW5903;
 		else if (info->model[4] == '0' && info->model[5] == '4')
 			type = GW5904;
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index da9f5d89be..0b2258e87a 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -1313,6 +1313,12 @@ int ft_board_setup(void *blob, bd_t *bd)
 		if (rev < 'C')
 			ft_board_wdog_fixup(blob, WDOG1_PATH);
 		break;
+	case GW5901:
+	case GW5902:
+		/* GW5901/GW5901 revB adds WDOG1_B as an external reset */
+		if (rev < 'B')
+			ft_board_wdog_fixup(blob, WDOG1_PATH);
+		break;
 	}
 
 	/* Configure DIO */
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index 3e24287fe7..4fa085b320 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -112,6 +112,8 @@ enum {
 	GW552x,
 	GW553x,
 	GW560x,
+	GW5901,
+	GW5902,
 	GW5903,
 	GW5904,
 	GW5905,
-- 
cgit 


From ad2efa3a289266866e62f984dbd93f0231116cdf Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:10:59 -0800
Subject: imx: ventana: gw5904/gw5909: disable RS485

The GW5904/GW5909 have a SP33E multi-protocol serial transceiver which we
want to configure to RS232 by default (by de-asserting RS485_EN)

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 8934f213dd..8786a12dc0 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -1429,6 +1429,8 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		break;
 	case GW5909:
 	case GW5904:
+		gpio_request(IMX_GPIO_NR(4, 23), "rs485_en");
+		gpio_direction_output(IMX_GPIO_NR(4, 23), 0);
 		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
 		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
 		gpio_request(IMX_GPIO_NR(5, 12), "skt1_rst#");
-- 
cgit 


From 1d23f7b1ae0d54450596df92acef86b02a14326d Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Mon, 4 Feb 2019 13:11:00 -0800
Subject: imx: ventana: fix usage of dt paths with leading 0s (Linux 4.15+)

device-tree paths should never be used that reference node addresses
making an assumption about leading zeros. They should not be there per
the device-tree specification however they have been there until Linux
4.15 when they were removed via kernel commit
8dccafaa281aa1d240a58bbcdff338aec114a021.

This fixes various issues which will occur when using Linux 4.15+
that are being fixed up on a per model per PCB revision basis such as:
 - enabling MMC UHS-I on board revisions that support it
 - enabling PWM based on hwconfig
 - fixing PCIe reset on GW552x
 - removing cpu external watchdog reset on boards that do not support it
 - populate PCI dt nodes based on PCI scan in order to fix GW16082
   interrupt mapping and inject MAC address for PCI based GbE

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 90 +++++++++++++++------------------
 1 file changed, 41 insertions(+), 49 deletions(-)

(limited to 'board/gateworks')

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 0b2258e87a..c63fb41e1b 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -879,34 +879,12 @@ static int ft_sethdmiinfmt(void *blob, char *mode)
 	return 0;
 }
 
-/* enable a property of a node if the node is found */
-static inline void ft_enable_path(void *blob, const char *path)
-{
-	int i = fdt_path_offset(blob, path);
-	if (i >= 0) {
-		debug("enabling %s\n", path);
-		fdt_status_okay(blob, i);
-	}
-}
-
-/* remove a property of a node if the node is found */
-static inline void ft_delprop_path(void *blob, const char *path,
-				   const char *name)
-{
-	int i = fdt_path_offset(blob, path);
-	if (i) {
-		debug("removing %s/%s\n", path, name);
-		fdt_delprop(blob, i, name);
-	}
-}
-
 #if defined(CONFIG_CMD_PCI)
 #define PCI_ID(x) ( \
 	(PCI_BUS(x->devfn)<<16)| \
 	(PCI_DEV(x->devfn)<<11)| \
 	(PCI_FUNC(x->devfn)<<8) \
 	)
-#define PCIE_PATH	"/soc/pcie@0x01000000"
 int fdt_add_pci_node(void *blob, int par, struct pci_dev *dev)
 {
 	uint32_t reg[5];
@@ -939,7 +917,7 @@ int fdt_add_pci_path(void *blob, struct pci_dev *dev)
 	int k, np;
 
 	/* build list of parents */
-	np = fdt_path_offset(blob, PCIE_PATH);
+	np = fdt_node_offset_by_compatible(blob, -1, "fsl,imx6q-pcie");
 	if (np < 0)
 		return np;
 
@@ -976,7 +954,7 @@ int fdt_fixup_gw16082(void *blob, int np, struct pci_dev *dev)
 	int i;
 
 	/* build irq-map based on host controllers map */
-	host = fdt_path_offset(blob, PCIE_PATH);
+	host = fdt_node_offset_by_compatible(blob, -1, "fsl,imx6q-pcie");
 	if (host < 0) {
 		printf("   %s failed: missing host\n", __func__);
 		return host;
@@ -1118,10 +1096,14 @@ void ft_board_pci_fixup(void *blob, bd_t *bd)
 }
 #endif /* if defined(CONFIG_CMD_PCI) */
 
-void ft_board_wdog_fixup(void *blob, const char *path)
+void ft_board_wdog_fixup(void *blob, phys_addr_t addr)
 {
-	ft_delprop_path(blob, path, "ext-reset-output");
-	ft_delprop_path(blob, path, "fsl,ext-reset-output");
+	int off = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", addr);
+
+	if (off) {
+		fdt_delprop(blob, off, "ext-reset-output");
+		fdt_delprop(blob, off, "fsl,ext-reset-output");
+	}
 }
 
 /*
@@ -1133,10 +1115,11 @@ void ft_board_wdog_fixup(void *blob, const char *path)
  *  - board (full model from EEPROM)
  *  - peripherals removed from DTB if not loaded on board (per EEPROM config)
  */
-#define UART1_PATH	"/soc/aips-bus@02100000/serial@021ec000"
-#define WDOG1_PATH	"/soc/aips-bus@02000000/wdog@020bc000"
-#define WDOG2_PATH	"/soc/aips-bus@02000000/wdog@020c0000"
-#define GPIO3_PATH	"/soc/aips-bus@02000000/gpio@020a4000"
+#define WDOG1_ADDR	0x20bc000
+#define WDOG2_ADDR	0x20c0000
+#define GPIO3_ADDR	0x20a4000
+#define USDHC3_ADDR	0x2198000
+#define PWM0_ADDR	0x2080000
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	struct ventana_board_info *info = &ventana_info;
@@ -1199,14 +1182,15 @@ int ft_board_setup(void *blob, bd_t *bd)
 		 * errata causing wdog timer to be unreliable.
 		 */
 		if (rev >= 'A' && rev < 'C') {
-			i = fdt_path_offset(blob, WDOG1_PATH);
+			i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt",
+							  WDOG1_ADDR);
 			if (i)
 				fdt_status_disabled(blob, i);
 		}
 
 		/* GW51xx-E adds WDOG1_B external reset */
 		if (rev < 'E')
-			ft_board_wdog_fixup(blob, WDOG1_PATH);
+			ft_board_wdog_fixup(blob, WDOG1_ADDR);
 		break;
 
 	case GW52xx:
@@ -1222,7 +1206,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 							   "reset-gpio", NULL);
 
 			if (range) {
-				i = fdt_path_offset(blob, GPIO3_PATH);
+				i = fdt_node_offset_by_compat_reg(blob,
+					"fsl,imx6q-gpio", GPIO3_ADDR);
 				if (i)
 					handle = fdt_get_phandle(blob, i);
 				if (handle) {
@@ -1237,18 +1222,19 @@ int ft_board_setup(void *blob, bd_t *bd)
 				gpio_cfg[board_type].usd_vsel = 0;
 
 			/* GW522x-B adds WDOG1_B external reset */
-			ft_board_wdog_fixup(blob, WDOG1_PATH);
+			if (rev < 'B')
+				ft_board_wdog_fixup(blob, WDOG1_ADDR);
 		}
 
 		/* GW520x-E adds WDOG1_B external reset */
 		else if (info->model[4] == '0' && rev < 'E')
-			ft_board_wdog_fixup(blob, WDOG1_PATH);
+			ft_board_wdog_fixup(blob, WDOG1_ADDR);
 		break;
 
 	case GW53xx:
 		/* GW53xx-E adds WDOG1_B external reset */
 		if (rev < 'E')
-			ft_board_wdog_fixup(blob, WDOG1_PATH);
+			ft_board_wdog_fixup(blob, WDOG1_ADDR);
 		break;
 
 	case GW54xx:
@@ -1256,13 +1242,12 @@ int ft_board_setup(void *blob, bd_t *bd)
 		 * disable serial2 node for GW54xx for compatibility with older
 		 * 3.10.x kernel that improperly had this node enabled in the DT
 		 */
-		i = fdt_path_offset(blob, UART1_PATH);
-		if (i)
-			fdt_del_node(blob, i);
+		fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED,
+					0);
 
 		/* GW54xx-E adds WDOG2_B external reset */
 		if (rev < 'E')
-			ft_board_wdog_fixup(blob, WDOG2_PATH);
+			ft_board_wdog_fixup(blob, WDOG2_ADDR);
 		break;
 
 	case GW551x:
@@ -1311,13 +1296,13 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 		/* GW551x-C adds WDOG1_B external reset */
 		if (rev < 'C')
-			ft_board_wdog_fixup(blob, WDOG1_PATH);
+			ft_board_wdog_fixup(blob, WDOG1_ADDR);
 		break;
 	case GW5901:
 	case GW5902:
 		/* GW5901/GW5901 revB adds WDOG1_B as an external reset */
 		if (rev < 'B')
-			ft_board_wdog_fixup(blob, WDOG1_PATH);
+			ft_board_wdog_fixup(blob, WDOG1_ADDR);
 		break;
 	}
 
@@ -1331,20 +1316,27 @@ int ft_board_setup(void *blob, bd_t *bd)
 			continue;
 		if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_param)
 		{
-			char path[48];
-			sprintf(path, "/soc/aips-bus@02000000/pwm@%08x",
-				0x02080000 + (0x4000 * (cfg->pwm_param - 1)));
+			phys_addr_t addr;
+			int off;
+
 			printf("   Enabling pwm%d for DIO%d\n",
 			       cfg->pwm_param, i);
-			ft_enable_path(blob, path);
+			addr = PWM0_ADDR + (0x4000 * (cfg->pwm_param - 1));
+			off = fdt_node_offset_by_compat_reg(blob,
+							    "fsl,imx6q-pwm",
+							    addr);
+			if (off)
+				fdt_status_okay(blob, off);
 		}
 	}
 
 	/* remove no-1-8-v if UHS-I support is present */
 	if (gpio_cfg[board_type].usd_vsel) {
 		debug("Enabling UHS-I support\n");
-		ft_delprop_path(blob, "/soc/aips-bus@02100000/usdhc@02198000",
-				"no-1-8-v");
+		i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-usdhc",
+						  USDHC3_ADDR);
+		if (i)
+			fdt_delprop(blob, i, "no-1-8-v");
 	}
 
 #if defined(CONFIG_CMD_PCI)
-- 
cgit