From 6032c029474cfba1ab2ff4a68e78905545c0c843 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Mon, 4 Dec 2017 17:54:50 -0600 Subject: ARM: omap3_logic: Enable NAND unlocking during Falcon mode Falcon mode was already working with SD card. This enables the unlocking of NAND to allow the NAND read & write. This also expands the README file based on the am335x describing how to setup Falcon mode. Signed-off-by: Adam Ford --- board/logicpd/omap3som/omap3logic.c | 41 +++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'board/logicpd/omap3som/omap3logic.c') diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c index cebb200c5f..b30fa24a32 100644 --- a/board/logicpd/omap3som/omap3logic.c +++ b/board/logicpd/omap3som/omap3logic.c @@ -114,6 +114,47 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) timings->ctrlb = MICRON_V_ACTIMB_200; timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; } + +#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c) +#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84) +#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80) + +void spl_board_prepare_for_linux(void) +{ + /* The Micron NAND starts locked which + * prohibits mounting the NAND as RW + * The following commands are what unlocks + * the NAND to become RW Falcon Mode does not + * have as many smarts as U-Boot, but Logic PD + * only makes NAND with 512MB so these hard coded + * values should work for all current models + */ + + writeb(0x70, GPMC_NAND_COMMAND_0); + writeb(-1, GPMC_NAND_DATA_0); + writeb(0x7a, GPMC_NAND_COMMAND_0); + writeb(0x00, GPMC_NAND_ADDRESS_0); + writeb(0x00, GPMC_NAND_ADDRESS_0); + writeb(0x00, GPMC_NAND_ADDRESS_0); + writeb(-1, GPMC_NAND_COMMAND_0); + + /* Begin address 0 */ + writeb(NAND_CMD_UNLOCK1, 0x6e00007c); + writeb(0x00, GPMC_NAND_ADDRESS_0); + writeb(0x00, GPMC_NAND_ADDRESS_0); + writeb(0x00, GPMC_NAND_ADDRESS_0); + writeb(-1, GPMC_NAND_DATA_0); + + /* Ending address at the end of Flash */ + writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0); + writeb(0xc0, GPMC_NAND_ADDRESS_0); + writeb(0xff, GPMC_NAND_ADDRESS_0); + writeb(0x03, GPMC_NAND_ADDRESS_0); + writeb(-1, GPMC_NAND_DATA_0); + writeb(0x79, GPMC_NAND_COMMAND_0); + writeb(-1, GPMC_NAND_DATA_0); + writeb(-1, GPMC_NAND_DATA_0); +} #endif #ifdef CONFIG_USB_MUSB_OMAP2PLUS -- cgit