From feaa60662768dcc97fdf7c593583876ce4e1564c Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 22 May 2013 03:57:42 +0000
Subject: MIPS: qemu-malta: add PCI support

Qemu emulates the Galileo GT64120 System Controller
which provides a CPU bus to PCI bus bridge.

The patch adds driver for this bridge and enables
PCI support for the emulated Malta board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
---
 board/qemu-malta/qemu-malta.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

(limited to 'board/qemu-malta')

diff --git a/board/qemu-malta/qemu-malta.c b/board/qemu-malta/qemu-malta.c
index 449da9c859..e3a733f42f 100644
--- a/board/qemu-malta/qemu-malta.c
+++ b/board/qemu-malta/qemu-malta.c
@@ -8,8 +8,10 @@
 
 #include <common.h>
 
+#include <asm/addrspace.h>
 #include <asm/io.h>
 #include <asm/malta.h>
+#include <pci_gt64120.h>
 
 phys_size_t initdram(int board_type)
 {
@@ -29,3 +31,13 @@ void _machine_restart(void)
 	reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE);
 	__raw_writel(GORESET, reset_base);
 }
+
+void pci_init_board(void)
+{
+	set_io_port_base(CKSEG1ADDR(MALTA_IO_PORT_BASE));
+
+	gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE),
+			 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
+			 0x10000000, 0x10000000, 128 * 1024 * 1024,
+			 0x00000000, 0x00000000, 0x20000);
+}
-- 
cgit