From 9aea95307fdb0ffe0d3a98a17ac73e5040c9756a Mon Sep 17 00:00:00 2001 From: wdenk Date: Sun, 1 Aug 2004 23:02:45 +0000 Subject: Patch by Jon Loeliger, 16 Jul 2004: - support larger DDR memories up to 2G on the PC8540/8560ADS and STXGP3 boards - Made MPC8540/8560ADS be 33Mhz PCI by default. - Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16 and CONFIG_L2_INIT_RAM options. - Refactor Local Bus initialization out of SDRAM setup. - Re-implement new version of LBC11/DDR11 errata workarounds. - Moved board specific PCI init parts out of CPU directory. - Added TLB entry for PCI-1 IO Memory - Updated README.mpc85xxads --- board/stxgp3/flash.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'board/stxgp3/flash.c') diff --git a/board/stxgp3/flash.c b/board/stxgp3/flash.c index e2739731e0..032989ba56 100644 --- a/board/stxgp3/flash.c +++ b/board/stxgp3/flash.c @@ -92,14 +92,12 @@ unsigned long flash_init (void) flash_info[0].size = size; -#if !defined(CONFIG_RAM_AS_FLASH) #if CFG_MONITOR_BASE >= CFG_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, CFG_MONITOR_BASE+monitor_flash_len-1, &flash_info[0]); -#endif #ifdef CFG_ENV_IS_IN_FLASH /* ENV protection ON by default */ -- cgit