From f1333417e82c3275cb46fe230bcdabd5b5f95922 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Tue, 8 May 2018 17:34:11 +0200 Subject: apalis-tk1: fix pcie reset for reliable gigabit ethernet operation It turns out that the current PCIe reset implementation in the PCIe board init function is not quite working reliably due to PCIe reset timing violations. Fix this by overriding the tegra_pcie_board_port_reset() function. Also allow optionally bringing up the PCIe switch as found on the Apalis Evaluation board. Note however that the Apalis PCIe port is also left disabled in the device tree by default. Signed-off-by: Marcel Ziswiler Signed-off-by: Tom Warren --- board/toradex/apalis-tk1/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'board/toradex/apalis-tk1/Kconfig') diff --git a/board/toradex/apalis-tk1/Kconfig b/board/toradex/apalis-tk1/Kconfig index 05407ad2d5..159b8fb19a 100644 --- a/board/toradex/apalis-tk1/Kconfig +++ b/board/toradex/apalis-tk1/Kconfig @@ -25,6 +25,14 @@ config TDX_CFG_BLOCK_PART config TDX_CFG_BLOCK_OFFSET default "-512" +config APALIS_TK1_PCIE_EVALBOARD_INIT + bool "Apalis Evaluation Board PCIe Initialisation" + help + Bring up the Apalis PCIe port with the PCIe switch as found on the + Apalis Evaluation board. Note that by default the PCIe port is also + left disabled in the device tree which needs changing as well for this + to actually work. + source "board/toradex/common/Kconfig" endif -- cgit