From 034477bb31948d698d18b84bc0834c3e25a14d04 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Wed, 16 Sep 2009 23:21:57 +0400 Subject: mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is available Since commit 5c2ff323a94e27e481f70c44838d43fcd844dd46 ("mpc8360emds: rework LBC SDRAM setup"), LBC SDRAM is available for use in Linux. Though, it appears that QE Ethernet in Gigabit mode can't transmit large packets when it tries to work with a data in LBC SDRAM (memtest didn't discover any issues, is LBC SDRAM just too slow?). With this patch we can still use the board without DDR memory, but if DDR is available, we don't use LBC SDRAM. Signed-off-by: Anton Vorontsov Signed-off-by: Kim Phillips --- board/freescale/mpc8360emds/mpc8360emds.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index dc4dbd3c3a..769eb2f11f 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -126,6 +126,7 @@ phys_size_t initdram(int board_type) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 msize = 0; + u32 lbc_sdram_size; if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) return -1; @@ -147,7 +148,9 @@ phys_size_t initdram(int board_type) /* * Initialize SDRAM if it is on local bus. */ - msize += sdram_init(msize * 1024 * 1024); + lbc_sdram_size = sdram_init(msize * 1024 * 1024); + if (!msize) + msize = lbc_sdram_size; /* return total bus SDRAM size(bytes) -- DDR */ return (msize * 1024 * 1024); -- cgit From 89da44ce3fe1638312d71cb3add8c6a6d2c7c1f3 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Wed, 16 Sep 2009 23:21:59 +0400 Subject: mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUs This patch fixes various ethernet issues with gigabit links handling in U-Boot. The workarounds originally implemented by Kim Phillips for Linux kernel. Signed-off-by: Anton Vorontsov Signed-off-by: Kim Phillips --- board/freescale/mpc8360emds/mpc8360emds.c | 56 +++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 6 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index 769eb2f11f..54f2989990 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -21,12 +21,14 @@ #endif #include #include +#include #if defined(CONFIG_OF_LIBFDT) #include #endif #if defined(CONFIG_PQ_MDS_PIB) #include "../common/pq-mds-pib.h" #endif +#include "../../../drivers/qe/uec.h" const qe_iop_conf_t qe_iop_conf_tab[] = { /* GETH1 */ @@ -89,11 +91,19 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ }; -int board_early_init_f(void) +/* Handle "mpc8360ea rev.2.1 erratum 2: RGMII Timing"? */ +static int board_handle_erratum2(void) { + const immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; - u8 *bcsr = (u8 *)CONFIG_SYS_BCSR; + return REVID_MAJOR(immr->sysconf.spridr) == 2 && + REVID_MINOR(immr->sysconf.spridr) == 1; +} + +int board_early_init_f(void) +{ const immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; + u8 *bcsr = (u8 *)CONFIG_SYS_BCSR; /* Enable flash write */ bcsr[0xa] &= ~0x04; @@ -105,6 +115,21 @@ int board_early_init_f(void) /* Enable second UART */ bcsr[0x9] &= ~0x01; + if (board_handle_erratum2()) { + void *immap = (immap_t *)(CONFIG_SYS_IMMR + 0x14a8); + + /* + * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2) + * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1) + */ + setbits_be32(immap, 0x0c003000); + + /* + * IMMR + 0x14AC[20:27] = 10101010 + * (data delay for both UCC's) + */ + clrsetbits_be32(immap + 4, 0xff0, 0xaa0); + } return 0; } @@ -116,6 +141,28 @@ int board_early_init_r(void) return 0; } +#ifdef CONFIG_UEC_ETH +static uec_info_t uec_info[] = { +#ifdef CONFIG_UEC_ETH1 + STD_UEC_INFO(1), +#endif +#ifdef CONFIG_UEC_ETH2 + STD_UEC_INFO(2), +#endif +}; + +int board_eth_init(bd_t *bd) +{ + if (board_handle_erratum2()) { + int i; + + for (i = 0; i < ARRAY_SIZE(uec_info); i++) + uec_info[i].enet_interface = ENET_1000_RGMII_RXID; + } + return uec_eth_init(bd, uec_info, ARRAY_SIZE(uec_info)); +} +#endif /* CONFIG_UEC_ETH */ + #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) extern void ddr_enable_ecc(unsigned int dram_size); #endif @@ -312,8 +359,6 @@ static int sdram_init(unsigned int base) { return 0; } #if defined(CONFIG_OF_BOARD_SETUP) void ft_board_setup(void *blob, bd_t *bd) { - const immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; - ft_cpu_setup(blob, bd); #ifdef CONFIG_PCI ft_pci_setup(blob, bd); @@ -323,8 +368,7 @@ void ft_board_setup(void *blob, bd_t *bd) * if on mpc8360ea rev. 2.1, * change both ucc phy-connection-types from rgmii-id to rgmii-rxid */ - if ((REVID_MAJOR(immr->sysconf.spridr) == 2) && - (REVID_MINOR(immr->sysconf.spridr) == 1)) { + if (board_handle_erratum2()) { int nodeoffset; const char *prop; int path; -- cgit From da6eea0f48c24a318e6de69d6bca0bb5ab70572b Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Wed, 16 Sep 2009 23:22:08 +0400 Subject: mpc83xx: mpc8360emds: Add QE USB device tree fixups With this patch we can change QE USB mode without need to hand-edit the device tree. Signed-off-by: Anton Vorontsov Signed-off-by: Kim Phillips --- board/freescale/mpc8360emds/mpc8360emds.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'board') diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index 54f2989990..d4ba043b28 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -25,6 +25,8 @@ #if defined(CONFIG_OF_LIBFDT) #include #endif +#include +#include #if defined(CONFIG_PQ_MDS_PIB) #include "../common/pq-mds-pib.h" #endif @@ -357,12 +359,22 @@ static int sdram_init(unsigned int base) { return 0; } #endif #if defined(CONFIG_OF_BOARD_SETUP) +static void ft_board_fixup_qe_usb(void *blob, bd_t *bd) +{ + if (!hwconfig_subarg_cmp("qe_usb", "mode", "peripheral")) + return; + + do_fixup_by_compat(blob, "fsl,mpc8323-qe-usb", "mode", + "peripheral", sizeof("peripheral"), 1); +} + void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); #ifdef CONFIG_PCI ft_pci_setup(blob, bd); #endif + ft_board_fixup_qe_usb(blob, bd); /* * mpc8360ea pb mds errata 2: RGMII timing * if on mpc8360ea rev. 2.1, -- cgit