From f75e89e9b5714db2b0e80074071dfbdd6f59488a Mon Sep 17 00:00:00 2001 From: Ed Swarthout Date: Thu, 30 Aug 2007 01:58:48 -0500 Subject: ft_board_setup update 85xx/86xx of pci/pcie bus-range property. pcie is now differentiated from pci. Add 8641 bus-range updates. Signed-off-by: Ed Swarthout --- board/cds/mpc8548cds/mpc8548cds.c | 2 +- board/freescale/mpc8544ds/mpc8544ds.c | 14 +++++++++++--- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 16 ++++++++++++++++ 3 files changed, 28 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c index 796ae22a69..36d7e1ed48 100644 --- a/board/cds/mpc8548cds/mpc8548cds.c +++ b/board/cds/mpc8548cds/mpc8548cds.c @@ -542,7 +542,7 @@ ft_pci_setup(void *blob, bd_t *bd) #endif #ifdef CONFIG_PCIE1 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@a000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 80822bec73..4c3b27f238 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -516,8 +516,16 @@ ft_board_setup(void *blob, bd_t *bd) *p++ = cpu_to_be32(bd->bi_memstart); *p = cpu_to_be32(bd->bi_memsize); } +#ifdef CONFIG_PCI1 + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8000/bus-range", &len); + if (p != NULL) { + p[0] = 0; + p[1] = pci1_hose.last_busno - pci1_hose.first_busno; + debug("PCI@8000 first_busno=%d last_busno=%d\n",p[0],p[1]); + } +#endif #ifdef CONFIG_PCIE1 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@a000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; @@ -525,7 +533,7 @@ ft_board_setup(void *blob, bd_t *bd) } #endif #ifdef CONFIG_PCIE2 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@9000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie2_hose.last_busno - pcie2_hose.first_busno; @@ -533,7 +541,7 @@ ft_board_setup(void *blob, bd_t *bd) } #endif #ifdef CONFIG_PCIE3 - p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@b000/bus-range", &len); + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@b000/bus-range", &len); if (p != NULL) { p[0] = 0; p[1] = pcie3_hose.last_busno - pcie3_hose.first_busno;; diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index ffd11cb5f1..931be9f375 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -338,6 +338,22 @@ ft_board_setup(void *blob, bd_t *bd) *p++ = cpu_to_be32(bd->bi_memstart); *p = cpu_to_be32(bd->bi_memsize); } +#ifdef CONFIG_PCI1 + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@8000/bus-range", &len); + if (p != NULL) { + p[0] = 0; + p[1] = pci1_hose.last_busno - pci1_hose.first_busno; + debug("PCI@8000 first_busno=%d last_busno=%d\n",p[0],p[1]); + } +#endif +#ifdef CONFIG_PCI2 + p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len); + if (p != NULL) { + p[0] = 0; + p[1] = pci2_hose.last_busno - pci2_hose.first_busno; + debug("PCI@9000 first_busno=%d last_busno=%d\n",p[0],p[1]); + } +#endif } #endif -- cgit From 56a9270521baaa00e12639a978302a67f61ef060 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 30 Aug 2007 16:18:18 -0500 Subject: Fix ULI RTC support on MPC8544 DS The RTC on the M1575 ULI chipset requires a dummy read before we are able to talk to the RTC. We accomplish this by adding a second memory region to the PHB the ULI is on and read from it. The second region is added to maintain compatiabilty with Linux's view of the PCI memory map. Signed-off-by: Kumar Gala --- board/freescale/mpc8544ds/init.S | 2 +- board/freescale/mpc8544ds/mpc8544ds.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S index 900c3680c7..68ccba746b 100644 --- a/board/freescale/mpc8544ds/init.S +++ b/board/freescale/mpc8544ds/init.S @@ -237,6 +237,6 @@ law_entry: /* contains both PCIE3 MEM & IO space */ .long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_2M) + .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_4M) 4: entry_end diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 4c3b27f238..76d909191f 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -222,6 +223,11 @@ pci_init_board(void) printf (" PCIE3 on bus %02x - %02x\n", hose->first_busno,hose->last_busno); + /* + * Activate ULI1575 legacy chip by performing a fake + * memory access. Needed to make ULI RTC work. + */ + in_be32(CFG_PCIE3_MEM_BASE); } else { printf (" PCIE3: disabled\n"); } -- cgit