From 33863f744d513f5c16a254870e7b3cef8580bbc9 Mon Sep 17 00:00:00 2001 From: Kurt Miller Date: Wed, 13 May 2020 15:55:20 -0400 Subject: rockchip: rk3328: rock64 - fix gen3 SPL hang Use the same approach as ROC-RK3328-CC which enables SPL GPIO, pinctl and regulator support. This allows the gen3 board to boot through SPL and does not break gen2 in the process. Signed-off-by: Kurt Miller Acked-by: Matwey V. Kornilov Reviewed-by: Kever Yang --- configs/rock64-rk3328_defconfig | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'configs/rock64-rk3328_defconfig') diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 7d096d38c6..0bc2198f5c 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y @@ -25,6 +26,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_CMD_BOOTZ=y @@ -36,7 +39,7 @@ CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_TPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -64,7 +67,9 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y +CONFIG_SPL_DM_REGULATOR=y CONFIG_REGULATOR_PWM=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -- cgit